mcf51ac256a Freescale Semiconductor, Inc, mcf51ac256a Datasheet - Page 77

• Manufacturer Part Number: mcf51ac256a
• Description: Mcf51ac Flexis
• Manufacturer: Freescale Semiconductor, Inc

4.4.5
4.4.5.1
The FACCERR flag will be set during the command write sequence if any of the following illegal steps
are performed, causing the command write sequence to immediately abort:
The FACCERR flag will also be set if the MCU enters stop mode while any command is active
(FCCF = 0). The operation is aborted immediately and, if burst programming, any pending burst program
command is purged (see
The FACCERR flag will not be set if any flash register is read during a valid command write sequence.
If the flash memory is read during execution of an algorithm (FCCF = 0), the read operation will return
invalid data and the FACCERR flag will not be set.
If the FACCERR flag is set in the FSTAT register, the user must clear the FACCERR flag before starting
another command write sequence (see
4.4.5.2
The FPVIOL flag will be set after the command is written to the FCMD register during a command write
sequence if any of the following illegal operations are attempted, causing the command write sequence to
immediately abort:
Freescale Semiconductor
1. Writing to a flash address before initializing the FCDIV register.
2. Writing a byte, word, or misaligned longword to a valid flash address.
3. Writing to any flash register other than FCMD after writing to a flash address.
4. Writing to a second flash address in the same command write sequence.
5. Writing an invalid command to the FCMD register unless the address written was in a protected
6. Writing a command other than burst program while FCBEF is set and FCCF is clear.
7. When security is enabled, writing a command other than erase verify or mass erase to the FCMD
8. Writing to a flash address after writing to the FCMD register.
9. Writing to any flash register other than FSTAT (to clear FCBEF) after writing to the FCMD
10. Writing a 0 to the FCBEF flag in the FSTAT register to abort a command write sequence.
1. Writing the program command if the address written in the command write sequence was in a
2. Writing the sector erase command if the address written in the command write sequence was in a
3. Writing the mass erase command while any flash protection is enabled.
area of the flash array.
register when the write originates from a non-secure memory location or from the background
debug mode.
register.
protected area of the flash array.
protected area of the flash array.
Illegal Flash Operations
Flash Access Violations
Flash Protection Violations
MCF51AC256 ColdFire Integrated Microcontroller Reference Manual, Rev. 5
Section 4.4.6.2, “Stop
Section 4.4.2.5, “Flash Status Register
Mode”).
(FSTAT)”).
Memory
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