tda8031hl-c107 NXP Semiconductors, tda8031hl-c107 Datasheet - Page 18

• Manufacturer Part Number: tda8031hl-c107
• Description: Usb Smart Card Reader Otp Or Rom
• Manufacturer: NXP Semiconductors

Philips Semiconductors
8.1.4
8.1.4.1
When the microcontroller wants to transmit a character to
the card, it writes the data in direct convention in this
register.
The transmission:
Table 9 UART transmit register (address 0DH; write only); note 1
Note
1. All bits are cleared after reset.
8.1.4.2
When the microcontroller wants to read data from the card,
it reads it from this register in direct convention.
In the event of synchronous cards, only UR0 is relevant
and is a copy of the state of the card I/O.
In the event of parity error:
Table 10 UART receive register (address 0DH; read only); note 1
Note
1. All bits are cleared after reset.
2003 Jul 04
Starts at the end of this writing (2 clock cycles after the
rising edge of WR) if the previous character has been
transmitted and if the extra guard time has expired
Starts at the end of the extra guard time if this one has
not expired
Starts at 13.5 ETU in manual mode and 15 ETU in
automatic mode if the previous character has been
NAKed by the card; see Section 8.1.4.4
The bit PE in the status register USR is set at 10.5 ETU
and INT0 falls LOW
In protocol T = 0, the received byte is not stored in URR;
In protocol T = 1, the received byte is stored.
USB smart card reader (OTP or ROM)
UR7
UT7
7
7
ISO UART REGISTERS
UART transmit register
UART receive register
UR6
UT6
6
6
UR5
UT5
5
5
UR4
UT4
4
4
18
When the transmission is completed:
In the event of synchronous cards (bit SAN set within
UCR2), UT0 is only relevant and is copied on the I/O of the
card. It is possible to write within the UTR before setting
the transmission mode, which may be useful in some
cases.
In both protocols, when a character has been stored, then
the bit RBF in the status register USR is set at 10.5 ETU.
This bit is reset when the character has been read from the
URR.
When the URR is empty, then bit FE (in the MSR) is set as
long as no character has been received.
Does not start if the transmission of the previous
character is not completed.
In T = 0, bit TBE is set at 11.5 ETU, and bit PE in the
event of parity error
In T = 1, bit TBE is set at 10.5 ETU.
UR3
UT3
3
3
UR2
UT2
2
2
TDA8030; TDA8031
UR1
UT1
1
1
Product specification
UR0
UT0
0
0