tda8031hl-c107 NXP Semiconductors, tda8031hl-c107 Datasheet - Page 36

• Manufacturer Part Number: tda8031hl-c107
• Description: Usb Smart Card Reader Otp Or Rom
• Manufacturer: NXP Semiconductors

Philips Semiconductors
8.5.2
A 12 to 48 MHz clock multiplier PLL is integrated on-chip. No external components are needed for the operation of the
PLL.
8.5.3
The bit clock recovery circuit recovers the clock from the incoming USB data stream using 4 oversampling principle.
It is able to track jitter and frequency drift as specified by the USB specification.
8.5.4
Table 30 The following I/O ports of the 83C51 are used for controlling the USB bus:
8.5.5
The digital interface consists of 3 major blocks:
2003 Jul 04
handbook, full pagewidth
P10
P11
P12
P13
P14
P15
P33
P34
P35
P25
P26
PORT
The Philips Serial Interface Engine (SIE) handles the USB protocol (i.e. synchronization pattern, recognition,
parallel/serial conversion, bit stuffing/de-stuffing, CRC checking/generating, PID verification/generation, address
recognition and handshake evaluation/generation)
A Memory Management Unit (MMU), controlling the buffering of data to and from the bus
An interface to the embedded 83C51 microcontroller.
USB smart card reader (OTP or ROM)
USB bus
P
B
I
B
USB_INT_MASK
USB_SOFTCONNECT_INT
USB_MC_READY
USB_CLK_EN_N
USB_RESET_N
USB_SOFTCONNECT_EXT
USB_INT_N
USB_SUSPEND
USB_WAKEUP_N
USB_MP_C
USB_MP_SEL
NTERFACE SIGNALS WITH THE MICROCONTROLLER
HASE
IT CLOCK RECOVERY
LOCK DIAGRAM
D
D
-
LOCKED LOOP
FUNCTION
TRANSCEIVER
ANALOG
OSCILLATOR
INTERFACE
ENGINE
SERIAL
should be set to logic 1 before entering power-down mode during suspend
and reset to logic 0 when leaving power-down mode
when set to logic 1, the internal 1.5 k resistor is connected to pin D+
the device is ready to accept a new transaction
when LOW, this signal indicates that the bus is no longer suspended
a LOW-level will reset the USB interface
when set to logic 1, V
which has been placed between pins D+ and DELATT
interrupt to the microcontroller
the device is in suspended state (TDA8030 only)
remote wake-up (TDA8030 only)
if set to logic 1, the data to the bus is a command; if set to logic 0 it is data
if set to logic 1, the USB interface is selected
Fig.11 USB block diagram.
MANAGEMENT
36
MEMORY
RAM
UNIT
DDD
is applied on the optional external 1.5 k resistor
DESCRIPTION
CONTROLLER
INTERFACE
MICRO-
TDA8030; TDA8031
CONTROLLER
Product specification
MICRO-
MGU891