pnx1700 NXP Semiconductors, pnx1700 Datasheet - Page 273

• Manufacturer Part Number: pnx1700
• Description: Connected Media Processor
• Manufacturer: NXP Semiconductors

Philips Semiconductors
Volume 1 of 1
2. Functional Description
PNX17XX_SER_1
Preliminary data sheet
Figure 1:
DCS Bus
To
TM525
MTL Bus
GPIO Module Block Diagram
5
Peripheral
Interrupt
Controller 0
Peripheral
Interrupt
Controller 4
PIO
Interface
IP_1814
Adapter
2.1 GPIO: The Basic Pin Behavior
A simplified block diagram of the GPIO module can be found in
the major interfaces of the GPIO module.
The following sections describe in more details the GPIO module behavior.
The pins that can be set as GPIO pins is available in
page 1-3
assignment. It also adds the inactive state value of the functional signal when the pin
is switched from its functional mode to GPIO mode. The inactive state is used to
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•
•
•
the GPIO pins
the MTL interface used to fetch data when operating in pattern generation mode
or used to store data when the GPIO module is used in sampling mode. In both
cases up to 4 First In First Out (FIFO) memory buffers are available for one of the
modes.
the DCS bus interface used to convey the MMIO register read and writes issued
by the TM5250 CPU or any other master connected to PNX17xx Series through
the PCI bus interface.
the 5 interrupt lines which are routed directly to the TM5250 CPU. 4 lines are
associated with the signal monitoring while the last interrupt line is linked to the
event monitoring.
under the column ‘GPIO #’. The following
Registers
Rev. 1 — 17 March 2006
PI
32x32
32x32
RF
RF
TimeStamp
Counter
FIFO
Control 0
FIFO
Control 3
Chapter 8: General Purpose Input Output Pins
GPIO CORE
Pattern
Generation
Control 3
Pattern
Generation
Control 0
Control 3
Control 0
Signal
Monitor
Signal
Monitor
TSU
Control
Table 1
Chapter ‘
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
PNX17xx Series
duplicates the GPIO pin
OP ctrl 3
in
Figure
OP ctrl 0
IP mux 3
IP mux 0
IP mux 4
Section 2.3 on
1. It presents
GPIO
Pins
8-2