pnx1700 NXP Semiconductors, pnx1700 Datasheet - Page 66

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pnx1700

Manufacturer Part Number
pnx1700
Description
Connected Media Processor
Manufacturer
NXP Semiconductors
Datasheet
Philips Semiconductors
Volume 1 of 1
Table 36: 10/100 LAN RMII Timing
Table 37: Audio Input Timing
PNX17XX_SER_1
Preliminary data sheet
Symbol
F
F
T
T
T
Symbol
F
F
T
T
T
AI_CLK
LAN_CLK
CLK
CLK-DV
SU-CLK
H-CLK
OSCLK
CLK-DV
SU-CLK
H-CLK
Parameter
LAN_CLK frequency
LAN_TX_CLK and LAN_RX_CLK frequency
Clock to LAN Outputs
Input setup time
Input hold time
Parameter
Audio Input oversampling frequency
Audio Input frequency
Clock to AI_WS
Input setup time
Input hold time
7.7 10/100 LAN In RMII Mode
7.8 Audio Input Interface
[36-1]
[36-2]
[36-3]
[36-4]
[37-1]
[37-2]
[37-3]
Figure 16: LAN 10/100 I/O Timing in RMII Mode
Notes:
1. Timing applies whether the clock is external or internal.
2. Timing applies whether the data is output on a positive or a negative edge.
3. See timing measurement conditions
Notes:
1. Timing applies whether the clock is external or internal.
2. Timing applies whether the data is output on a positive or a negative edge.
Rev. 1 — 17 March 2006
LAN_REF_CLK
LAN_TXD[1:0]
LAN_TX_EN
LAN_REF_CLK
LAN_RXD[1:0]
LAN_CRS_DV
LAN_RX_ER
Figure
Min
5
5
2
Min
4
4
0
T
SU-CLK
15.
Chapter 1: Integrated Circuit Data
Max
60
Max
50
50
13
25
10
valid
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
T
PNX17xx Series
CLK-DV
valid
T
H-CLK
Units
MHz
MHz
ns
ns
ns
Units
MHz
MHz
ns
ns
ns
Notes
1, 2, 3
1, 2, 3
1, 2, 3
Notes
3
1, 2, 3
1, 2, 3
1-39

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