pnx1700 NXP Semiconductors, pnx1700 Datasheet - Page 709

• Manufacturer Part Number: pnx1700
• Description: Connected Media Processor
• Manufacturer: NXP Semiconductors

Philips Semiconductors
Volume 1 of 1
PNX17XX_SER_1
Preliminary data sheet
5.2.5 Interrupt Bit
5.2.6 Packet Fragments
produce index) are owned by the consumer. One array element is kept empty even
with a full FIFO, so that it is easy to distinguish the full or empty state by looking at the
value of the produce index and consume index.
An array must have at least two elements to be able to indicate a full FIFO with a
produce index of value 0 and a consume index of value 1. The wrap-around of the
arrays is taken into account when determining if a FIFO is full, so a produce index
that indicates the last element in the array and a consume index that indicates the
first element in the array also means the FIFO is full. When the produce index and the
consume index are unequal and the consume index is not the produce index plus one
(with wrap around taken into account), then the FIFO is partially full and both the
consumer and producer own enough descriptors to be able to operate actively on the
FIFO.
The descriptor structures have an Interrupt bit, which if enabled, can be programmed
by software to interrupt the CPU when a packet with this bit set is processed. When
the Ethernet module is processing a descriptor and finds this bit set, it will cause an
interrupt to be triggered (after committing status to memory) by setting the
RxDoneInt, TxDoneInt or TxRTDoneInt bits in the IntStatus register and driving an
interrupt to the CPU. If the Interrupt bit is not set in the descriptor, then the
RxDoneInt, TxDoneInt or TxRTDoneInt are not set, and no interrupt is triggered.
Note: the corresponding bits in IntEnable must also be set to trigger interrupts.
This offers flexible ways of managing the descriptor FIFOs. For instance, the device
driver could add 10 packets to the Tx descriptor FIFO and set the Interrupt bit in
descriptor number 5 in the FIFO. This would invoke the interrupt service routine
before the transmit FIFO is completely exhausted. The device driver could add
another batch of packets to the descriptor array without interrupting continuous
transmission of packets.
For maximum flexibility in packet storage, packets can be split up into multiple packet
fragments with fragments located in different places in memory. In this case, one
descriptor is used for each packet fragment. Thus, a descriptor can point to a single
packet or to a fragment of a packet. Fragments allow for scatter/gather DMA
operations:
By stringing together fragments, it is possible to create large packets from small
memory areas. Another use of fragments is to be able to locate a packet header and
packet body in different places and to concatenate them without copy operations in
the device driver.
For transmission, the Last bit in the descriptor Control field indicates if the fragment is
the last in a packet; for receive packets the Last bit in the StatusInfo field of the status
words indicates if the fragment is the last in the packet. If the Last bit is 0, the next
descriptor belongs to the same Ethernet packet, If the Last bit is 1 the next descriptor
is a new Ethernet packet.
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Transmit packets are gathered from multiple fragments in memory
Receive packets can be scattered to multiple fragments in memory.
Rev. 1 — 17 March 2006
Chapter 23: LAN100 — Ethernet Media Access Controller
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
PNX17xx Series
23-36