pnx1700 NXP Semiconductors, pnx1700 Datasheet - Page 395

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pnx1700

Manufacturer Part Number
pnx1700
Description
Connected Media Processor
Manufacturer
NXP Semiconductors
Datasheet
Philips Semiconductors
Volume 1 of 1
PNX17XX_SER_1
Preliminary data sheet
4.3 LINT Parameters
4.4 HSRU Parameters
The phase of the first output pixel is programmed using PCoeff (reg
0x10,E2A8[21:16]). The upscaling ratio is programmed in DPCoeff (reg
0x10,E2A8[11:0]).
parameters.
Table 13: LINT programming
If Scaling ratio == 1
else
The phase of the first output pixel is programmed via HSRU_phase (reg 0x10
E2AC[5:0]). HSRU_d_phase (reg 0x10E2AC[27:16]) is the first-order phase
difference of the first output pixel, while HSRU_dd_phase (reg 0x10 E2B0[11:0]) and
HSRU_ddd_phase (reg 0x10 E2B0[25:16]) are the second and the third-order phase
differences, respectively, of the first output pixel.
of the programmable HSRU parameters. Note that the decimal points are actually
aligned for the different values and “s: stands of the sign extension that is
automatically performed by hardware (only the lower non-s values need to be
programmed).
For bypassing the HSRU, all the control parameters have to be set to 0.
Table 14: HSRU programming
Register bits
PCoeff
DPCoeff (0x10 E2A8[11:0])
Register bits
HSRU_phase
(0x10 E2AC[5:0])
HSRU_d_phase
(
HSRU_dd_phase
(
HSRU_ddd_phase
(
0x10E2AC[27:16])
0x10 E2B0[11:0])
0x10 E2B0[25:16])
DPCoeff = 0
DPCoeff = (1000 * H) / Scaling ratio
(0x10 E2A8[21:16])
Table 13
Rev. 1 — 17 March 2006
shows the min-max values of the LINT programming
Value
type
unsigned
unsigned
Value
type
unsigned
unsigned
signed
signed
// the decimal bits for 1.0000_0000_0000
Minimum value
0.0000_00
0.0000_0000_0001
Minimum value
0.0000_00
0.0000_0000_0001
s.ssss_ss10_0000_0
000_00
s.ssss_ssss_ssss_ss
10_0000_0000
Table 14
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
PNX17xx Series
shows the min-max values
Maximum value
0.1111_11
1.0000_0000_0000
Maximum value
0.1111_11
1.0000_0000_0000
s.ssss_ss01_1111_1
111_11
s.ssss_ssss_ssss_ss
01_1111_1111
Chapter 11: QVCP
11-38

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