mc68hc916y3 Freescale Semiconductor, Inc, mc68hc916y3 Datasheet - Page 424

• Manufacturer Part Number: mc68hc916y3
• Description: Mc68hc16y3 16 Bit Microcontroller
• Manufacturer: Freescale Semiconductor, Inc

D.7 Queued Serial Module
D.7.1 QSM Configuration Register
QSMCR — QSM Configuration Register
STOP — Low-Power Stop Mode Enable
D-46
MOTOROLA
RESET:
STOP
15
0
QSMCR bits enable stop and freeze modes, and determine the arbitration priority of
QSM interrupt requests.
NOTES:
0 = QSM clock operates normally.
1 = QSM clock is stopped.
$YFFC20 –
$YFFD00 –
$YFFD20 –
$YFFD40 –
Address
$YFFC0A
$YFFC0C
$YFFC0E
$YFFC1A
$YFFC1C
$YFFC1E
$YFFCFF
$YFFC00
$YFFC02
$YFFC04
$YFFC06
$YFFC08
$YFFC10
$YFFC12
$YFFC14
$YFFC16
$YFFC18
$YFFD1F
$YFFD3F
$YFFD4F
FRZ1
1. Y = M111, where M is the logic state of the module mapping (MM) bit in the SIMCR.
14
0
FRZ0
13
1
0
15
12
QSM Interrupt Level Register (QILR)
Port QS Pin Assignment Register
SPI Control Register 3 (SPCR3)
Freescale Semiconductor, Inc.
11
For More Information On This Product,
NOT USED
Table D-34 QSM Address Map
(PQSPAR)
10
Not Used
Go to: www.freescale.com
QSM Module Configuration Register (QSMCR)
9
SCI Control 0 Register (SCCR0)
SCI Control 1 Register (SCCR1)
SPI Control Register 0 (SPCR0)
SPI Control Register 1 (SPCR1)
SPI Control Register 2 (SPCR2)
QSM Test Register (QTEST)
SCI Status Register (SCSR)
SCI Data Register (SCDR)
Command RAM (CR[0:F])
8
Transmit RAM (TR[0:F])
Receive RAM (RR[0:F])
SUPV
7
1
Not Used
Not Used
Not Used
Not Used
8 7
Port QS Data Direction Register (DDRQS)
6
QSM Interrupt Vector Register (QIVR)
Port QS Data Register (PORTQS)
NOT USED
SPI Status Register (SPSR)
5
4
3
0
MC68HC16Y3/916Y3
USER’S MANUAL
2
0
IARB[3:0]
$YFFC00
1
0
0
0
0