peb2035 ETC-unknow, peb2035 Datasheet - Page 111

• Manufacturer Part Number: peb2035
• Description: Communications Advanced Cmos Frame Aligner
• Manufacturer: ETC-unknow

DAIS ... Disable AIS to System Interface
Idle Channel Register Bank (WRITE)
Only accessible if CPY.SW = 1 and CPY.BSEL = 1.
Value after RESET: 00
ICB1
ICB2
ICB3
ICB4
IC1 ... IC24 ... Idle Channel Selection Bits
PCM 24 Status Registers
Receive Status Register (READ)
RSR
NOS ... No Signal Indication
Semiconductor Group
0 ... AIS is automatically inserted into the data stream to RDO if ACFA is in asynchronous state.
1 ... Automatic AIS insertion is disabled. Furthermore, AIS insertion can be initiated by
0 ... Normal operation.
1 ... Idle channel mode. The content of the selected channel is overwritten by the idle channel
programming bit CCR.SAIS.
These bits define the channels of the outgoing PCM frame to be altered.
code defined via register IDLE.
This bit is set when
–
–
SCLK clock cycles (4096 kHz). The flag stays active for at least one multiframe. It will be
reset with the beginning of the next following multiframe if no alarm condition is detected.
The bit will be set during alarm simulation and reset if ASR.SC = 0, 3, 4, 7 and no alarm
condition exists.
31 or more consecutive zero bits are detected, or
a receive route clock pulse (port RRCLK) fails to occur in a time interval of 4 internal
7
7
IC17
NOS
IC1
IC9
H
, 00
IC10
IC18
IC2
AIS
H
, 00
H
IC11
IC19
LOS
, 00
IC3
H
IC12
IC20
RRA
IC4
(reserved)
111
SLPP
IC13
IC21
IC5
SLPN
IC14
IC22
IC6
IC15
IC23
IC7
1
FSRF
IC16
IC24
IC8
0
0
PEB 2035
(06)
(07)
(08)
(09)
(00)