peb2035 ETC-unknow, peb2035 Datasheet - Page 89

• Manufacturer Part Number: peb2035
• Description: Communications Advanced Cmos Frame Aligner
• Manufacturer: ETC-unknow

LOS … Loss Of Synchronization
RRA … Receive Remote Alarm
SLP … Receive Slip Indication
RPE … Receive Parity Error
Semiconductor Group
This bit is set after detecting 3 or 4 consecutive incorrect FAS words or 3 or 4 consecutive
incorrect service words (can be disabled). The specification of the loss of sync conditions is
done via bits RC1.SWD and RC1.ASY4. After loss of synchronization, the frame aligner will
resynchronize automatically. The following conditions have to be detected to regain
synchronous state:
– the presence of the correct FAS word in frame n
– the presence of the correct service word (bit 2 = 1) in frame n + 1
– for a second time the presence of a correct FAS word in frame n + 2
The bit is cleared when synchronization has been regained (directly after the second correct
FAS word of the procedure described above has been received).
If the CRC-multiframe structure is enabled by setting bit MODE.CRC, multiframe alignment
is assumed to be lost if pulseframe synchronization has been lost. The resynchronization
procedure for multiframe alignment starts after the bit RSR.LOS has been cleared.
Multiframe alignment has been regained if two consecutive CRC-multiframes have been
received without a framing error (refer to RSR.CAL).
The bit will be set during alarm simulation and reset if CCR.SIM is cleared and no alarm
condition exists.
In case no signal alarm (RSR.NOS) has been triggered by loss of route clock condition,
RSR.LOS will be set, too. It will be reset if ACFA stays at synchronous state and the ‘No
Signal’ alarm disappears.
Set if bit 3 of the received service word is set. RSR.RRA will be cleared when no alarm is
detected. The bit RSW.RRA has the same function.
Both bits will be set during alarm simulation and reset if CCR.AINT is cleared.
Toggles when the difference between the receive route clock RRCLK and the system clock
SCLK caused a received frame to be repeated or discarded.
This bit will toggle only once during alarm simulation.
Set when a parity error occurs in the received channel selected by register CPY. It is
cleared by setting bit CCR.CCPY.
The bit will be set during alarm simulation and must be cleared by setting bit CCR.CCPY.
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PEB 2035