peb2035 ETC-unknow, peb2035 Datasheet - Page 17

• Manufacturer Part Number: peb2035
• Description: Communications Advanced Cmos Frame Aligner
• Manufacturer: ETC-unknow

1.3
P-LCC
Pin No.
39
Semiconductor Group
Pin Definitions and Functions (cont’d)
P-DIP
Pin No.
35
Symbol
RSIGM /
RREQ
Input (I)
Output (O)
O
Function
Receive Signaling Marker
– PCM 30: Marks time-slot 16 of every received
– PCM 24: When using CCS or CAS-CC
a) Time-slot 31 (speech channel 24) in channel
b) Time-slot 23 (speech channel 24) in channel
When using the CAS-BR signaling scheme, the
robbed bit of each channel every six frames is
marked.
Receive Request
If access to the internal signaling stacks RSIG and
XSIG is enabled via bit XC0.ISIG, this port acts as
a DMA or interrupt request. It requires the
controller to read the stack RSIG.RREQ will be
held active until the first read access to RSIG is
finished. It will be generated
– PCM 30: once a doubleframe
– PCM 24: every three frames in CCS/CAS-CC
once a signaling frame (every six frames) at CAS-
BR mode. In dependance of bit EMOD.EDMA
signal RREQ will be cleared
– EDMA = 0: at the end of the first read access to
– EDMA = 1: with the beginning of the second
17
frame at port RDO.
signaling schemes (bit MODE.SIGM = 0)
RSIGM marks
translation mode 0 (bit MODE.CTM = 0)
translation mode 1. Setting bit FMR.SM24
shifts the marker to time-slot 16 (speech
channel 17).
mode, or
stack RSIG (rising edge of RDQ);
(PCM 30) or third (PCM 24) read access to
stack RSIG (falling edge of RDQ).
PEB 2035