at89c51re2-slsem ATMEL Corporation, at89c51re2-slsem Datasheet - Page 33
at89c51re2-slsem
Manufacturer Part Number
at89c51re2-slsem
Description
At89c51re2 8-bit Flash Microcontroller
Manufacturer
ATMEL Corporation
Datasheet
1.AT89C51RE2-SLSEM.pdf
(167 pages)
- Current page: 33 of 167
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FM0 Memory Architecture
User Space
Extra Row (XRow or XAF)
Hardware security Byte (HSB)
7663B–8051–03/07
The FM0 flash memory is made up of 5 blocks:
1. The memory array (user space) 128K bytes
2. The Extra Row also called FM0 XAF
3. The Hardware security bits (HSB)
4. The Fuse Configuration Byte (FCB)
5. The column latch
This space is composed of a 128K bytes Flash memory organized in 1024 pages of 128
bytes. It contains the user’s application code. This block can be access in Read/write
mode from FM0 and boot memory area. (When access in write mode from FM0, the
CPU core enter pseudo idle mode).
This row is a part of FM0 and has a size of 128 bytes. The extra row (XAF) may contain
information for boot loader usage.This block can be access in Read/write mode from
FM0 and boot memory area. (When access in write mode from FM0, the CPU core enter
pseudo idle mode).
The Hardware security Byte is a part of FM0 and has a size of 1 byte.
The 8 bits can be read/written by software (from FM0 or RM0) and written by hardware
in parallel mode.
The HSB bits can be written to ‘0’ without any restriction (increase the security level of
the chip), but can be written to ‘1’ only when the corresponding memory area of the lock
bits was full chip erased.
Table 18. Hardware Security Byte (HSB)
Number
Bit
6-4
2-0
7
3
7
-
Mnemonic
FLB2-0
Bit
-
-
-
6
1
Description
Unused
-
Unused
FM0 Memory Lock Bits
See Table 21
ELB1
5
ELBO
4
3
-
FLB2
2
FLB1
1
FLB0
0
33
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