at89c51re2-slsem ATMEL Corporation, at89c51re2-slsem Datasheet - Page 55

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at89c51re2-slsem

Manufacturer Part Number
at89c51re2-slsem
Description
At89c51re2 8-bit Flash Microcontroller
Manufacturer
ATMEL Corporation
Datasheet
38
AT89C51RE2
The communication link detection is done by a circular polling on all the interfaces. On
AT89C51RE2, the ISP interfaces are all based on simple UART mechanisms (Rx, Tx).
The Rx line default state is ‘1’ when no communication is in progress. A transition from
‘1’ to ‘0’ on the Rx line indicates a start of frame.
Once one of the interface detects a starts of frame (‘0’) on its Rx line, the interface is
selected and configuration of the communication link starts.
Figure 4. Communication link Detection
Notes:
1. SF : Start of Frame (‘0’ = detected ; ‘1’ = not detected)
2. In AT89C51RE2 implementation, Interface 1 refers to UART0 and Interface 2 refers
to the OCD UART interface.
Interface 1
Interface 2
Detection
No
No
SF = 0
SF = 0
Start
Yes
Yes
Initialisation
Interface 2
Start Bootloader
Initialisation
Interface 1
7663B–8051–03/07

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