at89c51re2-slsem ATMEL Corporation, at89c51re2-slsem Datasheet - Page 95

• Manufacturer Part Number: at89c51re2-slsem
• Description: At89c51re2 8-bit Flash Microcontroller
• Manufacturer: ATMEL Corporation

Serial I/O Port
Framing Error Detection
78
AT89C51RE2
The serial I/O ports in the AT89C51RE2 are compatible with the serial I/O port in the
80C52.
They provide both synchronous and asynchronous communication modes. They oper-
ates as a Universal Asynchronous Receiver and Transmitter (UART) in three full-duplex
modes (Modes 1, 2 and 3). Asynchronous transmission and reception can occur simul-
taneously and at different baud rates
Both serial I/O port include the following enhancements:
•
•
As these improvements apply to both UART, most of the time in the following lines,
there won’t be any reference to UART_0 or UART_1, but only to UART, generally
speaking.
Framing bit error detection is provided for the three asynchronous modes (modes 1, 2
and 3). To enable the framing bit error detection feature, set SMOD0 bit in PCON regis-
ter (See Figure 20) for UART 0 or set SMOD0_1 in BDRCON_1 register for UART 1
(See Figure 21).
Figure 20. UART 0 Framing Error Block Diagram
Figure 21. UART 1 Framing Error Block Diagram
When this feature is enabled, the receiver checks each incoming data frame for a valid
stop bit. An invalid stop bit may result from noise on the serial lines or from simultaneous
transmission by two CPUs. If a valid stop bit is not found, the Framing Error bit (FE) in
SCON register (See Table 62.) bit is set.
Software may examine FE bit after each reception to check for data errors. Once set,
only software or a reset can clear FE bit. Subsequently received frames with valid stop
bits cannot clear FE bit. When FE feature is enabled, RI rises on stop bit instead of the
last data bit (See Figure 22 and Figure 23).
SM0_1/FE_1
SM0D1_1SMOD0_1
SM0/FE
SM0D1
Framing error detection
Automatic address recognition
SMOD0
SM1_1
SM1
SM2_1
SM2
-
-
Set FE bit if stop bit is 0 (framing error) (SMOD0 = 1)
SM0 to UART 0 mode control (SMOD0 = 0)
To UART 0 framing error control
Set FE_1 bit if stop bit is 0 (framing error) (SMOD0_1 = 1)
SM0 to UART 1 mode control (SMOD0_1 = 0)
To UART 1 framing error control
REN_1
BRR_1
REN
POF
TBCK_1 RBCK_1 SPD_1
TB8_1
GF1
TB8
RB8_1
RB8
GF0
TI_1
PD
TI
SRC_1
RI_1
IDL
RI
SCON_0 (98h)
SCON_1 (C0h)
PCON (87h)
BDRCON_1 (87h)
7663B–8051–03/07