at89c51re2-slsem ATMEL Corporation, at89c51re2-slsem Datasheet - Page 81

• Manufacturer Part Number: at89c51re2-slsem
• Description: At89c51re2 8-bit Flash Microcontroller
• Manufacturer: ATMEL Corporation

Registers
64
AT89C51RE2
Table 46. T2CON Register
T2CON - Timer 2 Control Register (C8h)
Reset Value = 0000 0000b
Bit addressable
Number
TF2
Bit
7
7
6
5
4
3
2
1
0
Mnemonic Description
CP/RL2#
EXEN2
EXF2
C/T2#
RCLK
EXF2
TCLK
TR2
Bit
TF2
6
Timer 2 overflow Flag
Must be cleared by software.
Set by hardware on Timer 2 overflow, if RCLK = 0 and TCLK = 0.
Timer 2 External Flag
Set when a capture or a reload is caused by a negative transition on T2EX pin if
EXEN2=1.
When set, causes the CPU to vector to Timer 2 interrupt routine when Timer 2
interrupt is enabled.
Must be cleared by software. EXF2 doesn’t cause an interrupt in Up/down
counter mode (DCEN = 1).
Receive Clock bit
Cleared to use timer 1 overflow as receive clock for serial port in mode 1 or 3.
Set to use Timer 2 overflow as receive clock for serial port in mode 1 or 3.
Transmit Clock bit
Cleared to use timer 1 overflow as transmit clock for serial port in mode 1 or 3.
Set to use Timer 2 overflow as transmit clock for serial port in mode 1 or 3.
Timer 2 External Enable bit
Cleared to ignore events on T2EX pin for Timer 2 operation.
Set to cause a capture or reload when a negative transition on T2EX pin is
detected, if Timer 2 is not used to clock the serial port.
Timer 2 Run control bit
Cleared to turn off Timer 2.
Set to turn on Timer 2.
Timer/Counter 2 select bit
Cleared for timer operation (input from internal clock system: F
Set for counter operation (input from T2 input pin, falling edge trigger). Must be 0
for clock out mode.
Timer 2 Capture/Reload bit
If RCLK=1 or TCLK=1, CP/RL2# is ignored and timer is forced to auto-reload on
Timer 2 overflow.
Cleared to auto-reload on Timer 2 overflows or negative transitions on T2EX pin
if EXEN2=1.
Set to capture on negative transitions on T2EX pin if EXEN2=1.
RCLK
5
TCLK
4
EXEN2
3
TR2
2
C/T2#
1
CLK PERIPH
7663B–8051–03/07
CP/RL2#
).
0