sta003t STMicroelectronics, sta003t Datasheet - Page 8

• Manufacturer Part Number: sta003t
• Description: Mpeg 2.5 Layer Iii Audio Decoder
• Manufacturer: STMicroelectronics

STA003T
2.4 - PCM Output Interface
The decoded audio data are output in serial PCM
format. The interface consists of the following sig-
nals:
SDO
SCKT
LRCLK
The output samples precision is selectable from
Figure 8. PCM Output Formats
Table 1: MPEG Sampling Rates (KHz)
2.5 - STA003T Decoding States
There are three different decoder states: Idle,
Init, and Decode. Commands to change the de-
coding states are described in the STA003T I
registers description.
Idle Mode
In this mode the decoder is waiting for the RUN
command. This mode should be used to initialise
the configuration register of the device. The DAC
connected to STA003T can be initialised during
this mode (set MUTE to 1).
8/32
PLAY
X
X
PCM Serial Clock Output
Left/Right Channel Selection Clock
PCM Serial Data Output
MPEG 1
MUTE
LRCKT
48
32
LRCKT
SDO
SDO
SDO
SDO
SDO
SDO
0
1
Clock State
Not Running
Running
0
M
S
M
S
L
S
32 SCLK Cycles
16 SCLK Cycles
MSB
M
S
0
L
S
M
S
M
S
L
S
0
0
L
S
L
S
M
S
L
S
PCM Output
0
M
S
M
S
MSB
L
S
32 SCLK Cycles
16 SCLK Cycles
M
S
0
0
0
L
S
M
S
M
S
L
S
0
0
2
L
S
L
S
L
S
M
S
C
MPEG 2
0
M
S
M
S
L
S
32 SCLK Cycles
16 SCLK Cycles
MSB
M
S
0
24
16
L
S
16 to 24 bits/word, by setting the output precision
(16, 18, 20 and 24 bits) with PCMCONF register.
Data can be output either with the most signifi-
cant bit first (MS) or least significant bit first (LS),
selected by writing into a flag of the PCMCONF
register.
Figure 8 gives a description of the STA003T PCM
Output Formats.
The sample rates set decoded by STA003T is de-
scribed in Table 1.
M
S
Init Mode
"PLAY" and "MUTE" changes are ignored in this
mode. The internal state of the decoder will be
updated only when the decoder changes from the
state "init" to the state "decode". The "init" phase
ends when the first decoded samples are at the
output stage of the device.
Decode Mode
This mode is completely described by the follow-
ing table:
M
S
L
S
PLAY
0
0
0
0
1
1
L
S
L
S
M
S
L
S
0
M
S
M
S
L
S
32 SCLK Cycles
MSB
16 SCLK Cycles
M
S
0
MUTE
L
S
M
S
M
S
L
S
0
1
0
1
0
0
L
S
M
S
L
S
L
S
32 SCLK Cycles
PCM_FORMAT = 1
PCM_DIFF = 1
PCM_FORMAT = 0
PCM_DIFF = 0
PCM_FORMAT = 0
PCM_DIFF = 1
PCM_FORMAT = 1
PCM_DIFF = 1
16 SCLK Cycles
PCM_ORD = 0
PCM_PREC is 16 bit mode
PCM_ORD = 1
PCM_PREC is 16 bit mode
Not Running
Clock State
Running
Running
Running
MPEG 2.5
Decoded
Samples
12
Output
8
PCM
0
0
0
Decoding
Yes
Yes
No
No