attiny13-20ss ATMEL Corporation, attiny13-20ss Datasheet - Page 36

• Manufacturer Part Number: attiny13-20ss
• Description: 8-bit Microcontroller With 1k Bytes In-system Programmable Flash - Atmel Corporation
• Manufacturer: ATMEL Corporation

Watchdog Timer
36
ATtiny13
ATtiny13 has an Enhanced Watchdog Timer (WDT). The main features are:
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Figure 19. Watchdog Timer
The Watchdog Timer (WDT) is a timer counting cycles of a separate on-chip 128 kHz
oscillator. The WDT gives an interrupt or a system reset when the counter reaches a
given time-out value. In normal operation mode, it is required that the system uses the
WDR - Watchdog Timer Reset - instruction to restart the counter before the time-out
value is reached. If the system doesn't restart the counter, an interrupt or system reset
will be issued.
In Interrupt mode, the WDT gives an interrupt when the timer expires. This interrupt can
be used to wake the device from sleep-modes, and also as a general system timer. One
example is to limit the maximum time allowed for certain operations, giving an interrupt
when the operation has run longer than expected. In System Reset mode, the WDT
gives a reset when the timer expires. This is typically used to prevent system hang-up in
case of runaway code. The third mode, Interrupt and System Reset mode, combines the
other two modes by first giving an interrupt and then switch to System Reset mode. This
mode will for instance allow a safe shutdown by saving critical parameters before a sys-
tem reset.
The Watchdog always on (WDTON) fuse, if programmed, will force the Watchdog Timer
to System Reset mode. With the fuse programmed the System Reset mode bit (WDE)
and Interrupt mode bit (WDTIE) are locked to 1 and 0 respectively. To further ensure
program security, alterations to the Watchdog set-up must follow timed sequences. The
sequence for clearing WDE and changing time-out configuration is as follows:
1. In the same operation, write a logic one to the Watchdog change enable bit
2. Within the next four clock cycles, write the WDE and Watchdog prescaler bits
Clocked from separate On-chip Oscillator
3 Operating modes
Selectable Time-out period from 16ms to 8s
Possible Hardware fuse Watchdog always on (WDTON) for fail-safe mode
– Interrupt
– System Reset
– Interrupt and System Reset
(WDCE) and WDE. A logic one must be written to WDE regardless of the previ-
ous value of the WDE bit.
(WDP) as desired, but with the WDCE bit cleared. This must be done in one
operation.
WATCHDOG
RESET
OSCILLATOR
128kHz
WDTIE
WDTIF
WDE
WDP0
WDP1
WDP2
WDP3
MCU RESET
INTERRUPT
2535G–AVR–01/07