cs5954am Cypress Semiconductor Corporation., cs5954am Datasheet - Page 11

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cs5954am

Manufacturer Part Number
cs5954am
Description
Usb Controller For Nand Flash
Manufacturer
Cypress Semiconductor Corporation.
Datasheet

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4.5.2
The Frame Number Register contains the 11-bit ID number of the last SOF received by the device from the USB host.
4.5.3
Address Register holds the USB address of the device assigned by the Host–initialized to address 0x0000 upon power-up.
4.5.4
This is the USB Command Done Register. It is only used by the control point (endpoint 0).
4.6
See the USB Endpoint 3 control and status register for more information.
4.7
See the USB Endpoint 3 control and status register for more information.
4.8
See the USB Endpoint 3 control and status register for more information.
4.9
4.9.1
The CS5954AM controller supports four endpoints. Endpoint 0 is the default pipe and is used to initialize and control the peripheral
device. It also provides access to the peripheral device’s configuration information, and supports control transfers. Endpoints 1,
2, and 3 support interrupt transfers, bulk transfers up to 64 Bytes/packet, or Isochronous transfers up to 1024 Bytes/packet size.
4.9.2
Each of the endpoint control registers, when written, have the following functions assigned.
Notes:
Document #: 38-08025 Rev. **
Bit Position
5.
6.
D15
D15
D15
D6–D15
0
0
0
The CS5954AM BIOS uses this register to detect USB activity for the internal idle task.
The CS5954AM BIOS modifies this register upon receiving the SET_ADDRESS from the host. (See [Ref. 3] Universal Serial Bus Specification v2.0 sec. 9 for
more information.)
D0
D1
D2
D3
D4
D5
D15-D11
D10-D0
D15-D7
D6-D0
D15–D1
D0
USB Frame Number Register (0xC082: Read-only)
USB Address Register (0xC084: R/W)
USB Command Done Register (0xC086: Write-only)
USB Endpoint 0 Control and Status Register (0xC090: R/W)
USB Endpoint 1 Control and Status Register (0xC092: R/W)
USB Endpoint 2 Control and Status Register (0xC094: R/W)
USB Endpoint 3 Control and Status Register (0xC096: R/W)
General Description for All Endpoints from Endpoint 0 to Endpoint 3
USB Endpoint Control (for Writing)
D14
D14
D14
0
0
0
Zero Length When set to “1” it sends a zero length packet.
Not Defined
Bit Name
D13
D13
D13
Enable
ARM
0
0
0
Stall
DIR
ISO
Reserved
S10-S0
Reserved
A6-A0
Reserved
E
D12
D12
D12
0
0
0
Allows enabled transfers when set to “1.” Cleared to “0” when transfer is complete.
When set to “1” it allows transfers to this endpoint. When set to “0” USB transactions are ignored.
If enable = “1” and Arm = “0” the endpoint will return NAK to USB transmissions.
When set to “1” it transmits to Host (IN). When “0” receive from Host (OUT).
When set to “1” it allows Isochronous mode for this endpoint.
When set to “1” it sends Stall in response to next request on this endpoint.
Set to logic “0”s.
D11
D11
D11
0
0
0
set to all zeros.
SOF ID number of last SOF received.
set to all zeros.
USB address of device after assignment by host.
set to all zeros
set E = 0 for successful command completion
set E = 1 for error command completion.
D10
D10
D10
S10
0
0
D9
S9
D9
D9
ADVANCE
INFORMATION
0
0
D8
D8
D8
S8
0
0
D7
S7
D7
D7
0
0
Function
D6
D6
D6
S6
A6
0
D5
S5
D5
A5
D5
0
D4
S4
D4
[7]
D4
A4
0
D3
S3
D3
A3
D3
0
D2
S2
D2
D2
A2
0
CS5954AM
Page 11 of 44
D1
S1
D1
A1
D1
0
[5]
D0
S0
D0
A0
D0
E
[6]

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