cs5954am Cypress Semiconductor Corporation., cs5954am Datasheet - Page 7

• Manufacturer Part Number: cs5954am
• Description: Usb Controller For Nand Flash
• Manufacturer: Cypress Semiconductor Corporation.

3.5
The CS5954AM contains 3K×8 internal RAM. The RAM can be used for code/program, variables, buffer I/O, and USB packets.
This memory can be accessed by the 16-Bit processor for data manipulation or by the SIE (Serial Interface Engine), which
receives or sends USB host data.
3.6
A 12- or 48-MHz external crystal, or logic-level clock can be used with the CS5954AM. Two pins, XIN and XOUT, are provided
to connect a low-cost crystal circuit to the device. If a logic-level clock is available, it may be connected directly to the XIN pin
instead of using a crystal.
Register C006 must be configured appropriately depending on the frequency used.
3.7
The CS5954AM has a built-in SIE and USB transceiver that meet the USB specification v2.0. The transceiver is capable of
transmitting or receiving serial data at the USB maximum data rate of 12 Mbits/sec. The CS5954AM controller supports four
endpoints. Endpoint 0 is the default pipe and is used to initialize and manipulate the peripheral device. It also provides access to
the peripheral device’s configuration information, and supports control transfers. Endpoint 1, 2, and 3 support interrupt transfers,
Bulk transfers (up to 64 Bytes/packet), or Isochronous transfers (up to 1024 Bytes/packet size).
3.8
The CS5954AM provides software control registers that can be used to configure chip mode, clock generator, and software
breakpoint, and to read the BIOS version.
3.9
The CS5954AM provides 128 interrupt vectors for its BIOS software interface (see [Ref. 1] SL11R_BIOS).
3.10
The CS5954AM provides an interface to an external serial EEPROM. The interface is implemented using general-purpose I/O
signals. A variety of serial EEPROM formats can be supported; currently the BIOS ROM supports a 2-wire serial EEPROM. A
serial EEPROM can be used to store specific peripheral USB configuration and value-added functions. In addition, serial
EEPROM can be used for field product upgrades.
3.11
The CS5954AM provides a multiplexed address port and an 8-/16-bit data port. This port can be configured to interface to an
external SRAM.
3.12
The CS5954AM has two built-in programmable timers that can provide an interrupt to the CS5954AM engine. On every clock tick
(which is one microsecond), the timers decrement. An interrupt occurs when the timer reaches zero. A separate Watchdog timer
is also provided to provide a fail-safe mechanism. The Watchdog timer can also interrupt the CS5954AM processor.
3.13
The CS5954AM CPU supports suspend, resume, and CPU low-power modes. The CS5954AM BIOS assigns GPIO29 for the
USB DATA+ line pull-up (this pin can simulate USB cable removal or insertion while the USB power is still applied to the board)
and the GPIO20 for controlling the power-off function.
3.14
The CS5954AM has a general-purpose I/O interface mode.
3.14.1
In the GPIO mode, the CS5954AM has up to 32 general-purpose I/O signals available. However, four pins that are used by the
2-wire serial interface cannot be used as GPIO pins. On any other available general-purpose programmable I/O, the pins can be
programmed for peripheral control and/or status.
Note:
Document #: 38-08025 Rev. **
1.
The 2-wire serial interface I/O pins are fixed in all cases.
Internal RAM
Clock Generator
USB Interface
Processor Control Registers
Interrupts
2-Wire Serial EEPROM Interface
External SRAM Interface
General Timers and Watchdog Timer
Special GPIO Functionality for Suspend, Resume, and Low-power Modes
CS5954AM Interface Modes
General-purpose I/O Mode (GPIO)
ADVANCE
INFORMATION
[1]
CS5954AM
Page 7 of 44