cs5954am Cypress Semiconductor Corporation., cs5954am Datasheet - Page 28

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cs5954am

Manufacturer Part Number
cs5954am
Description
Usb Controller For Nand Flash
Manufacturer
Cypress Semiconductor Corporation.
Datasheet

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Table 7-1. Pin Assignment and Description (continued)
8.0
This is the specification for the CS5954AM Processor Instruction set.
8.1
This document describes the CS5954AM CPU Instruction Set, Registers and Addressing modes, Instruction format, etc. The
CS5954AM PROCESSOR uses a unified program and data memory space; although this RAM is also integrated into the
CS5954AM core, provision has been made for external memory as well.
The CS5954AM PROCESSOR engine incorporates 38 registers: fifteen general-purpose registers, a stack pointer, sixteen
registers mapped into RAM, a program counter, and a REGBANK register whose function will be described in a subsequent
section.
The CS5954AM PROCESSOR engine supports byte and word addressing. Subsequent sections of this document will describe:
8.2
On receiving hardware reset, the CS5954AM Processor jumps to address 0xFFF0, which is an internal ROM address.
8.3
The CS5954AM Processor incorporates 16-bit general-purpose registers called R0..R15, a REGBANK register, and a program
counter, along with various other registers. The function of each register is defined as follows.
Document #: 38-08025 Rev. **
R0-R14
R15
PC
REGBANK
FLAGS
INTERRUPT ENABLE
• The CS5954AM PROCESSOR Engine (QT Engine) Register Set
• CS5954AM PROCESSOR Engine Instruction Format
• CS5954AM PROCESSOR Engine Addressing Modes
• CS5954AM PROCESSOR Engine Instruction Set.
Pin No. Pin Name
100
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
Instruction Set Overview
Reset Vector
Register Set
CS5954AM CPU Programming Guide
GPIO10
GPIO9
DPLUS
DMINUS
GND1
GPIO8
GPIO7
GPIO6
GPIO5
GPIO4
GPIO3
GPIO2
GPIO1
GPIO0
VDD
VDD1
Name
Pin Type
Power
Power
GND
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
General-purpose Registers
Stack Pointer
Program Counter
Forms base address for registers R0-R15
Contains flags: defined below
Bit masks to enable/disable various interrupts
GPIO10
GPIO9
USB +3.3 VDC Supply.
USB Differential DATA Signal High Side.
USB Differential DATA Signal Low Side.
USB Digital Ground.
GPIO8
GPIO7
GPIO6
GPIO5
GPIO4
GPIO3
GPIO2
GPIO1
GPIO0
+3.3 VDC Supply.
ADVANCE
INFORMATION
Function
Description
CS5954AM
Page 28 of 44

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