cs5954am Cypress Semiconductor Corporation., cs5954am Datasheet - Page 30

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cs5954am

Manufacturer Part Number
cs5954am
Description
Usb Controller For Nand Flash
Manufacturer
Cypress Semiconductor Corporation.
Datasheet

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8.9
This section describes in detail the six-operand field bits referred to in the previous section as source and destination. Bear in
mind that although the discussion refers to bits 0 through 5, the same bit definitions apply to the “source” operand field, bits 6
through 11. These are the basic addressing modes in the CS5954AM processor.
8.10
In register addressing, any one of registers R0–R15 can be selected using bits 0–3. If register addressing is used, operands are
always 16-bit operands, since all registers are 16-bit registers. For example, an instruction using register R7 as an operand would
fill the operand field as follows.
8.11
In Immediate Addressing, the instruction word is immediately followed by the source operand. For example, the operand field
would be filled as follows.
8.12
In Direct Addressing, the word following the instruction word is used as an address into RAM. Again, the operand can be either
byte or word sized, depending on the state of bit 3 of the operand field. For example, to do a word-wide read from a direct address,
the source operand field would be formed as follows.
8.13
Indirect addressing is accomplished using address registers R8–15. In Indirect addressing, the operand is found at the memory
address pointed to by the register. Since only eight address registers exist, only three bits are required to select an address
register. For example, register R10 (binary 1010) can be selected by ignoring bit 3, leaving the bits 010. Bit 3 of the operand field
is then used as the byte/word bit, set to “0” to select word or “1” to select byte addressing. In this example, a byte-wide operand
is selected at the memory location pointed to by register R10.
Notes:
Document #: 38-08025 Rev. **
Register Operand
28. b/w: “1” for byte-wide access, “0” for word access.
29. Indirect with auto-increment and byte-wide Indirect addressing is illegal with the stack pointer (R15).
30. In immediate addressing, the source operand must be 16 bits wide, eliminating the need for a b/w bit.
31. For a memory-to-memory move, the instruction word would be followed by two words, the first being the source address and the second being the destination.
32. For register R15, byte-wide operands are prohibited. If bit 3 is set high, the instruction is decoded differently, as explained at the top of this section.
Register
Immediate
Direct
Indirect
Indirect with Auto Increment
Indirect with Index
Operand field
I/O operand
Memory operand
Addressing Modes
Register Addressing
Immediate Addressing
Direct Addressing
Indirect Addressing
Mode
[30]
Bits
Bits
Bits
Bits
[29]
0
1
5
0
0
1
1
ADVANCE
INFORMATION
[31]
[32]
4
0
1
0
1
0
1
5
0
5
0
5
1
5
0
4
0
4
1
4
0
4
1
b/w
b/w
b/w
b/w
3
1
r
[28]
[28]
[28]
[28]
3
1
3
1
3
0
3
0
2
1
1
r
r
r
r
2
0
2
1
2
1
2
1
1
1
1
1
1
1
1
1
1
1
1
r
r
r
r
CS5954AM
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0
0
0
1
0
1
0
1
0
1
1
r
r
r
r

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