s71ws256jc0 Meet Spansion Inc., s71ws256jc0 Datasheet - Page 153

• Manufacturer Part Number: s71ws256jc0
• Description: Stacked Multi-chip Product Mcp 128/64 Megabit 8m/4m X 16-bit Cmos 1.8 Volt-only, Simultaneous Read/write, Burst Mode Flash Memory With Cellularram
• Manufacturer: Meet Spansion Inc.

Notes:
1. Non-default BCR settings: Latency code two (three clocks); Wait active Low; Wait asserted during delay.
2. OE# can stay Low during burst suspend. If OE# is Low, DQ[15:0] will continue to output valid data.
152
DQ[15:0]
LB#/UB#
A[22:0]
ADV#
WAIT
WE#
CE#
OE#
CLK
V IH
V IL
V IH
V IL
V IH
V IL
V IH
V IL
V IH
V IL
V IH
V IL
V IH
V IL
V IH
V IL
V OH
V OL
High-Z
t SP
Address
t CSP
t SP
t HD
t SP
t SP
Valid
t CEW
High-Z
t HD
t HD
t HD
Figure 33.8 Refresh Collision During Write Operation
t OLZ
t ACLK
t BOE
t CLK
OUTPUT
VALID
t KOH
OUTPUT
VALID
A d v a n c e
CellularRAM Type 2
OUTPUT
VALID
OUTPUT
VALID
I n f o r m a t i o n
t OHZ
(Note 2)
t OLZ
t BOE
OUTPUT
VALID
Legend:
OUTPUT
VALID
CellRam_03_A0 March 9, 2005
Don't Care
t HZ
t OHZ
High-Z
t CBPH
Address
Valid
Undefined