s71ws256jc0 Meet Spansion Inc., s71ws256jc0 Datasheet - Page 95

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s71ws256jc0

Manufacturer Part Number
s71ws256jc0
Description
Stacked Multi-chip Product Mcp 128/64 Megabit 8m/4m X 16-bit Cmos 1.8 Volt-only, Simultaneous Read/write, Burst Mode Flash Memory With Cellularram
Manufacturer
Meet Spansion Inc.
Datasheet
Notes:
1. Figure shows total number of wait states set to seven cycles. The total number of wait states can be programmed from
2. If any burst address occurs at a 64-word boundary, two additional clock cycle when wait state is set to less than 5 or
3. The device is in synchronous mode.
June 24, 2005 S29WS-J_M0_A4
two cycles to seven cycles.
three additional clock cycle when wait state is set to 6 & 7 are inserted, and is indicated by RDY.
Addresses
AVD#
Data
RDY
CE#
CLK
OE#
Hi-Z
t
t
AVC
ACS
t
CR
t
ACH
Aa
1
t
CES
Figure 22.3 CLK Synchronous Burst Mode Read (rising active CLK)
t
AVD
2
D a t a
t
OE
3
t
ACC
7 cycles for initial access shown.
t
IACC
S h e e t
S29WS128J/064J
4
5
6
t
RACC
7
Da
t
BDH
t
RDYS
Da + 1
t
BACC
t
Da + n
t
CEZ
OEZ
Hi-Z
Hi-Z
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