cn8237 Mindspeed Technologies, cn8237 Datasheet - Page 132

• Manufacturer Part Number: cn8237
• Description: Atm Oc-12 Servicesar Plus With Xbr Traffic Management
• Manufacturer: Mindspeed Technologies

5.0 Reassembly Coprocessor
5.5 Global Statistics
5-24
5.4.10.3 Credit Return
The user returns credit, at the same time the buffer is recovered to the free buffer
queue, by writing the third word of the free buffer queue. The VCC_INDEX is
written to the channel to which credit is returned. The FWD_VLD bit is set to a
logic high, and the QFC bit is set to a logic low. The RSM coprocessor increments
the RX_COUNTER[15:0] of the applicable channel. For proper operation of the
update interval function, buffers must be returned at the same time as credits are
returned.
return buffer credits independently from buffer usage, the CN8237 maintains a
separate read pointer into free buffer queues that return credits. This pointer name
is FORWARD, located in the free buffer queue base table entry. The host
determines the number of Bank 0 free buffer queues that return credits by setting
FWD_EN in the RSM_FQCTRL register.
When a write completes, the CN8237 will begin processing firewall return credits
on that queue. The third word of each entry is read, and if FWD_VLD is set, a
credit is added to the VCC_INDEX indicated. The CN8237 continues to process
credit return entries until FWD_VLD is 0. Multiple free buffer queues might have
credit return entries outstanding at one time. The CN8237 processes the entries
according to the priority set in FWD_RND in the RSM_FQCTRL register. If
FWD_RND is a logic low, the CN8237 exhausts the credit returns on the highest
number active queue before proceeding to other queues. Otherwise, it services the
queues in round-robin order.
FORWARD read pointer to the first entry where credit is returned. Typically, this
is the first entry after the initial buffers placed on the queue.
5.5 Global Statistics
To meet the requirements of ILMI (ATM Forum) and AToM (RFC1695)
documents, three register-based counters are implemented:
16-bit counter. All three are set to 0 upon a reset and are not reset to 0 upon a read
of the counter by the host. The counters roll over and optionally cause an interrupt
upon rollover.
Credits are returned to VCCs through Bank 0 free buffer queues. In order to
The CN8237 snoops writes to free buffer queues that return firewall credits.
Before the reassembly coprocessor is enabled, the host must initialize the
• CELL_RCVD_CNT—Number of cells received that map to active channels.
• CELL_DSC_CNT—Number of cells received that map to inactive
• AAL5_DSC_CNT—Number of AAL5 CPCS-PDUs discarded due to per
The first two counters are implemented as 32-bit counters, and the third is a
channels. This includes idle cells, since those channels will be turned off.
channel firewall, buffer queue underflow, FIFO buffer full packet discard,
status queue overflow, or maximum CPCS-PDU length exceeded on
non-EOM cells.
Mindspeed Technologies
ATM OC-12 ServiceSAR Plus with xBR Traffic Management
™
28237-DSH-001-C
CN8237