FM24C256FEYYX FAIRCHILD [Fairchild Semiconductor], FM24C256FEYYX Datasheet - Page 7

• Manufacturer Part Number: FM24C256FEYYX
• Description: 256 KBit 2-Wire Bus Interface Serial EEPROM with Write Protect
• Manufacturer: FAIRCHILD [Fairchild Semiconductor]

FM24C256 rev. B.3
ACK (acknowledge) is a software convention used to indicate
successful data transfers. The transmitting device, either master or
slave, will release the bus after transmitting eight bits. During the ninth
clock cycle the receiver will pull the SDA line LOW to acknowledge
that it received the eight bits of data. Refer to Figure 3 .
The FM24C256xxx device will always respond with an acknowl-
edge after recognition of a start condition and its slave address. If
SCL
SDA
SDA
SDA
SCL
SCL
from Transmitter
from Receiver
Data Output
Data Output
SCL FROM
WORD n
START CONDITION
MASTER
8th BIT
START
DATA STABLE
ACK
1
CONDITION
CHANGE
STOP
DATA
both the device and a WRITE operation have been selected, the
FM24C256xxx will respond with an acknowledge after the receipt
of each subsequent eight bit word.
In the READ mode the FM24C256xxx slave will transmit eight bits
of data, release the SDA line and monitor the line for an acknowl-
edge. If an acknowledge is detected and no stop condition is
generated by the master, the slave will continue to transmit data.
If an acknowledge is not detected, the slave will terminate further
data transmissions and await the stop condition to return to the
standby power mode.
t WR
STOP CONDITION
8
CONDITION
ACKNOWLEDGE
START
9
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