cxa3516r Sony Electronics, cxa3516r Datasheet - Page 52

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cxa3516r

Manufacturer Part Number
cxa3516r
Description
3-channel 8-bit 165msps A/d Converter Amplifier Pll
Manufacturer
Sony Electronics
Datasheet

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• XTLOAD signal (reset signal)
• Delay sync output status during hold
The values given in the above table are for when the DSYNC POL register is set to "1". The delay sync
output status is reversed when DSYNC POL is set to "0".
This input pin forces to reset the divider function of the programmable counter.
Since this signal is not normally used, leave it open or fix to high level.
When it is used, this signal is in conjunction with the HOLD signal. See the note given later regarding the
combined use of these signals.
Register: The delay sync output during the hold period can be controlled with the DSYNC Hold register and
the HOLD signal.
The output status resulting from this setting differs based on status of the DSYNC By-pass register.
Delay sync output status
DSYNC Hold
Register: DSYNC Hold
Register:
Programmable counter status
0
0
0
0
1
1
1
1
XTLOAD pin
DSYNC By-pass
Register:
0
0
1
1
0
0
1
1
Using HOLD signal logic
Forcible reset
(When HOLD POL
register = 1)
0
HOLD signal logic
– 52 –
L
H
H
H
H
L
L
L
L
DSYNC signal/DIVOUT signal
Count
H
Delay sync output
DIVOUT signal
DIVOUT signal
DIVOUT signal
DSYNC signal
DSYNC signal
DSYNC signal
1
L
L
CXA3516R

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