cxa3516r Sony Electronics, cxa3516r Datasheet - Page 65

• Manufacturer Part Number: cxa3516r
• Description: 3-channel 8-bit 165msps A/d Converter Amplifier Pll
• Manufacturer: Sony Electronics

A/D Converter
• Analog input signal
• Sampling clock
• Reference voltage
• Operational mode
The RGB analog input signal and YCbCr analog input signal are converted to digital signals and output. Be
sure to adjust the input dynamic range of the ADC in the pre-stage amplifier block by performing contrast and
brightness settings for the analog signal input to the ADC. (See the item on the amplifier for details on the
setting procedure.)
Although the sampling clock is created by a PLL (internal CLK), it is also possible to externally input a clock
to the ADC (external CLK) directly for checking ADC operations. In this case, be sure to make the register
settings below in order to input a PECL level clock from the CLKIN (Pin 110) and the XCLKIN (Pin 109).
Note, however, that even if an external CLK is input under the above settings, it is impossible to run the ADC
at the input clock frequency unless the PLL's VCO frequency divider is set to 1/1. Running the ADC on an
external CLK is done in order to check the operations of the ADC. Normally, it should be run on the internal
CLK generated by the PLL.
The input dynamic range of the ADC is determined based on the reference voltage from the VRT (Pin 17)
and the VRB (Pin 93). Since this reference voltage is created using an internal band gap voltage, there is no
need for an external reference voltage circuit. The voltage at the VRT pin is set to a voltage approximately
0.4V lower than the voltage coming from the AV
approximately 1.0V lower than that at the VRT pin.
Capacitors of 1µF or more should be connected between the AV
reference voltage pins (VRT pin and VRB pin).
If the value of the capacitor is too low or no capacitor is attached, the reference voltage circuit will cause an
oscillation that results in noise or malfunction because the ADC faithfully samples this oscillation.
It is impossible to apply an external voltage to a reference voltage pin. Note that it is also impossible to use
the voltage generated by a reference voltage pin as an external voltage source.
The ADC output data of this IC supports five types of operational mode. Each operational mode is set by
using a control register.
For a description of each operational mode, see the next page.
Straight Data out Mode
DMUX Parallel Data out Mode
DMUX Interleaved Data out Mode
4:2:2 Data out D2 Mode
4:2:2 Data out special Mode
Register: VCO By-pass
ADC clock
Register: DATA OUT MODE
D3
0
0
0
0
1
External CLK
0
– 65 –
CC
D2
0
0
1
1
1
AD3 power pin. Also, the VRB pin is set to a voltage
Internal CLK
D1
0
1
0
1
1
1
CC
AD3 power supply pins for these
CXA3516R