cxa3516r Sony Electronics, cxa3516r Datasheet - Page 66

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cxa3516r

Manufacturer Part Number
cxa3516r
Description
3-channel 8-bit 165msps A/d Converter Amplifier Pll
Manufacturer
Sony Electronics
Datasheet

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• Description of the operational modes
The hold time of the post-stage scaling IC using the interface shown above is,
(Straight Data out Mode)
An RGB analog input signal AC coupled is optimized by using a 3-ch AMP and the signal is input to the ADC.
The analog input signal input to the ADC is sampled by using a clock generated by the PLL.
The identical signal with the sampling clock for analog input signal is output from the CLK (Pin 99).
The sampled analog input signal is output from the port A side of the data output with a 3-clock pipeline
delay. Note that output for port B side is turned off at this time and cannot be set to high impedance.
The ADC data output is output with a propagation delay (Td_8) ranges from 2.2ns (min.) to 3.8ns (max.)
versus the clock output from the CLK pin.
The operational frequency in Straight Data out Mode is 100MHz at the sampling clock frequency.
Also, note, when operating in Straight Data out Mode, that the output on the port B side (RB0 to RB7, GB0 to
GB7, and BB0 to BB7) is turned off and cannot be set to high impedance.
All TTL output are set to high impedance only when this IC is put into power save mode.
The following type of interface is possible when this IC is operated in Straight Data out Mode.
th (min.) = 2.2ns
CXA3516R
RA0 to RA7
GA0 to GA7
BA0 to BA7
1/2XCLK
1/2CLK
XCLK
CLK
99
98
101
100
max.
min.
th (min.)
Td_8
2.2ns (min.) to 3.8ns (max.)
– 66 –
Scaling IC
CXA3516R

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