CD4071BCN Fairchild Semiconductor, CD4071BCN Datasheet
CD4071BCN
Specifications of CD4071BCN
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CD4071BCN Summary of contents
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... Ordering Code: Order Number Package Number CD4071BCM M14A 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow CD4071BCN N14A 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide CD4081BCM M14A 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow ...
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Schematic Diagrams CD4071B CD4081B www.fairchildsemi.com device shown Logical “1” HIGH Logical “0” LOW *All inputs protected by standard CMOS protection circuit device shown • B Logical “1” ...
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Absolute Maximum Ratings (Note 2) Voltage at Any Pin 0. Power Dissipation ( Dual-In-Line Small Outline V Range 0 Storage Temperature ( Lead Temperature ( (Soldering, 10 seconds) DC Electrical ...
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AC Electrical Characteristics 25 C, Input ns, C CD4081BC Symbol Parameter t Propagation Delay Time, PHL HIGH-to-LOW Level t Propagation Delay Time, PLH LOW-to-HIGH Level Transition Time THL ...
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Typical Performance Characteristics (Continued) 5 www.fairchildsemi.com ...
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Physical Dimensions inches (millimeters) unless otherwise noted 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow www.fairchildsemi.com Package Number M14A 6 ...
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Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right ...