HD6417706 RENESAS [Renesas Technology Corp], HD6417706 Datasheet - Page 330

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HD6417706

Manufacturer Part Number
HD6417706
Description
Renesas 32-Bit RISC Microcomputer Super RISC engine Family/SH7700 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet

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Note:
The compare match counter (CMCNT) is a 16-bit register used as an up-counter.
When an internal clock is selected with the CKS1 and CKS0 bits of the CMCSR and the STR bit
of the CMSTR is set to 1, the CMCNT begins incrementing with the selected clock. When the
CMCNT value matches that of the CMCOR, the CMCNT is cleared to H'0000 and the CMF flag
of the CMCSR is set to 1.
The CMCNT0 is initialized to H'0000 by resets. It retains its previous value in standby mode.
The compare match constant register (CMCOR) is a 16-bit register that sets the compare match
period with the CMCNT.
The CMCOR is initialized to H'FFFF by resets. It retains its previous value in standby mode.
Rev. 4.00, 03/04, page 284 of 660
Bit
7
6
5 to 2
1
0
Compare Match Counter (CMCNT)
Compare Match Constant Register (CMCOR)
* The only value that can be written is 0 to clear the flag.
Bit Name
CMF
CKS1
CKS0
Initial Value
0
0
0
0
0
R/W
R/(W)* Compare match flag
R/W
R
R/W
R/W
Description
This flag indicates whether CMCNT and CMCOR
values have matched or not.
0: CMCNT and CMCOR values have not matched
1: CMCNT and CMCOR values have matched
Reserved
Both read and write are available. The write value
should always be 0.
Reserved
These bits always read as 0. The write value
should always be 0.
Clock select 1 and 0
These bits select the clock input to the CMCNT
from among the four internal clocks obtained by
dividing the system clock (P ). When the STR bit
of the CMSTR is set to 1, the CMCNT begins
incrementing with the clock selected by CKS1 and
CKS0.
00: P /4
01: P /8
10: P /16
11: P /64
Clearing condition: Write 0 to CMF after
reading CMF = 1

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