HD6417706 RENESAS [Renesas Technology Corp], HD6417706 Datasheet - Page 69

• Manufacturer Part Number: HD6417706
• Description: Renesas 32-Bit RISC Microcomputer Super RISC engine Family/SH7700 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

2.3.2
Addressing modes and effective address calculation methods are shown in table 2.2.
Table 2.2
Addressing
Mode
Register
direct
Register
indirect
Register
indirect with
post-
increment
Register
indirect with
pre-
decrement
Addressing Modes
Addressing Modes and Effective Addresses
Instruction
Format
Rn
@Rn
@Rn+
@–Rn
Effective Address Calculation Method
Effective address is register Rn. (Operand is
register Rn contents.)
Effective address is register Rn contents.
Effective address is register Rn contents. A
constant is added to Rn after instruction
execution: 1 for a byte operand, 2 for a word
operand, 4 for a longword operand.
Effective address is register Rn contents,
decremented by a constant beforehand: 1 for
a byte operand, 2 for a word operand, 4 for a
longword operand.
1/2/4
1/2/4
Rn
Rn
Rn
Rn + 1/2/4
Rn – 1/2/4
+
–
Rn – 1/2/4
Rn
Rn
Rev. 4.00, 03/04, page 23 of 660
Calculation Formula
—
Rn
Rn
After instruction
execution
Byte: Rn + 1
Word: Rn + 2
Longword: Rn + 4
Rn
Byte: Rn – 1
Word: Rn – 2
Longword: Rn – 4
Rn
(Instruction executed
with Rn after
calculation)
Rn
Rn
Rn
Rn