M58LW032C110ZA6 STMICROELECTRONICS [STMicroelectronics], M58LW032C110ZA6 Datasheet - Page 17

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M58LW032C110ZA6

Manufacturer Part Number
M58LW032C110ZA6
Description
32 Mbit 2Mb x16, Uniform Block, Burst 3V Supply Flash Memory
Manufacturer
STMICROELECTRONICS [STMicroelectronics]
Datasheet
Table 3. Configuration Register
Note: 1. 4 - 2 - 2 - 2 (represents X-Y-Y-Y) is not allowed.
Address
6 to 4
Bit
16
15
14
12
11
10
to
to
9
8
7
3
1
2. X latencies can be calculated as: (t
3. Y latencies can be calculated as: t
4. t
is the clock period).
SYSTEM MARGIN
CR13-CR11
Mnemonic
CR5-CR3
CR2-CR0
CR15
CR14
CR10
CR9
CR8
CR7
CR6
is the time margin required for the calculation.
Read Select
Y-Latency
Valid Data
Ready
Burst Type
Valid Clock
Edge
Burst Length
Clock Divider
X-Latency
Bit Name
Internal
(3)
KHQV
AVQV
(2)
+ t
– t
Reset
Value
XXX
XXX
SYSTEM MARGIN
LLKH
X
X
X
X
X
1
+ t
QVKH
Value
001
010
011
100
101
110
001
010
111
0
1
0
1
0
1
0
1
0
1
0
1
) + t
+ t
SYSTEM MARGIN
QVKH
Synchronous Burst Read
Asynchronous Bus Read (default at power-up)
Reserved
X-Latency = 4, 4-1-1-1 (use only with Y-Latency = 1)
X-Latency = 5, 5-1-1-1, 5-2-2-2
X-Latency = 6, 6-1-1-1, 6-2-2-2
X-Latency = 7, 7-1-1-1, 7-2-2-2
X-Latency = 8, 8-1-1-1, 8-2-2-2
X and Y-Latencies remains as set in CR13-CR11 and
CR9
Divides internal clock, X and Y-Latencies multiplied by 2
Y-Latency = 1
Y-Latency = 2
R valid Low during valid Clock edge
R valid Low one cycle before valid Clock edge
Interleaved
Sequential
Falling Clock edge
Rising Clock edge
4 Words
8 Words
Continuous
< Y t
Reserved
Reserved
K.
< (X -1) t
K.
(X is an integer number from 4 to 8 and t
Description
M58LW032C
17/61
(1)
K

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