M58BW016DB70T3FF STMICROELECTRONICS [STMicroelectronics], M58BW016DB70T3FF Datasheet - Page 7

• Manufacturer Part Number: M58BW016DB70T3FF
• Description: 16 Mbit (512 Kb x 32, boot block, burst) 3 V supply Flash memories
• Manufacturer: STMICROELECTRONICS [STMicroelectronics]

M58BW016DT, M58BW016DB, M58BW016FT, M58BW016FB
1
Description
The M58BW016DT, M58BW016DB, M58BW016FT and M58BW016FB are 16 Mbit non-
volatile Flash memories that can be erased electrically at the block level and programmed
in-system on a double-word basis using a 2.7 V to 3.6 V V
V
can be used to provide fast program and erase for a limited time and number of
program/erase cycles.
The devices support Asynchronous (Latch Controlled and Page Read) and Synchronous
Bus operations. The Synchronous Burst Read interface allows a high data transfer rate
controlled by the Burst Clock, K, signal. It is capable of bursting fixed or unlimited lengths of
data. The burst type, latency and length can be configured and can be easily adapted to a
large variety of system clock frequencies and microprocessors. All writes are asynchronous.
On power-up the memory defaults to Read mode with an Asynchronous Bus.
The devices have a boot block architecture with an array of 8 parameter blocks of 64 Kb
each and 31 main blocks of 512 Kb each. In the M58BW016DT and M58BW016FT the
parameter blocks are located at the top of the address space whereas in the M58BW016DB
and M58BW016FB, they are located at the bottom.
Program and Erase commands are written to the command interface of the memory. An on-
chip Program/Erase controller simplifies the process of programming or erasing the memory
by taking care of all of the special operations that are required to update the memory
contents. The end of a program or erase operation can be detected and any error conditions
identified in the Status Register. The command set required to control the memory is
consistent with JEDEC standards.
Erase can be suspended in order to perform either Read or Program in any other block and
then resumed. Program can be suspended to Read data in any other block and then
resumed. Each block can be programmed and erased over 100,000 cycles.
All blocks are protected during power-up.
The M58BW016DT, M58BW016DB, M58BW016FT and M58BW016FB feature two different
levels of block protection to avoid unwanted program/erase operations:
The memory is offered in a PQFP80 (14 x 20 mm) and LBGA80 (10 × 12 mm) package.
In order to meet environmental requirements, ST offers the devices in ECOPACK
packages. These packages have a Lead-free second level interconnect. The category of
second level interconnect is marked on the package and on the inner box label, in
compliance with JEDEC Standard JESD97. The maximum ratings related to soldering
conditions are also marked on the inner box label. ECOPACK is an ST trademark.
ECOPACK specifications are available at: www.st.com.
The memories are supplied with all the bits erased (set to ’1’).
DDQ
The WP pin offers an hardware protection on two of the parameter blocks and all of the
main blocks
All program or erase operations are blocked when Reset, RP, is held Low. A
Reset/Power-down mode is entered when the RP input is Low. In this mode the power
consumption is lower than in the normal standby mode, the device is write protected
and both the Status and the Burst Configuration Registers are cleared. A recovery time
is required when the RP input goes High.
supply down to 2.4 V for the input and output buffers. Optionally a 12 V V
DD
supply for the circuit and a
Description
PP
®
supply
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