ATMEGA48V_11 ATMEL [ATMEL Corporation], ATMEGA48V_11 Datasheet - Page 103
ATMEGA48V_11
Manufacturer Part Number
ATMEGA48V_11
Description
8-bit Atmel Microcontroller with 4/8/16K Bytes In-System Programmable Flash
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet
1.ATMEGA48V_11.pdf
(377 pages)
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2545T–AVR–05/11
Note:
Table 15-7
rect PWM mode.
Table 15-7.
Note:
• Bits 3, 2 – Res: Reserved bits
These bits are reserved bits in the Atmel ATmega48/88/168 and will always read as zero.
• Bits 1:0 – WGM01:0: Waveform generation mode
Combined with the WGM02 bit found in the TCCR0B Register, these bits control the counting
sequence of the counter, the source for maximum (TOP) counter value, and what type of wave-
form generation to be used, see
unit are: Normal mode (counter), Clear Timer on Compare Match (CTC) mode, and two types of
Pulse Width Modulation (PWM) modes (see
Table 15-8.
Notes:
Mode
COM0B1
0
1
2
3
4
5
6
7
0
0
1
1
1. A special case occurs when OCR0B equals TOP and COM0B1 is set. In this case, the Com-
1. A special case occurs when OCR0B equals TOP and COM0B1 is set. In this case, the Com-
2. BOTTOM = 0x00
1. MAX
WGM02
pare Match is ignored, but the set or clear is done at TOP. See
for more details.
pare Match is ignored, but the set or clear is done at TOP. See
page 97
shows the COM0B1:0 bit functionality when the WGM02:0 bits are set to phase cor-
0
0
0
0
1
1
1
1
Compare output mode, phase correct PWM mode
Waveform generation mode bit description.
COM0B0
for more details.
= 0xFF
0
1
0
1
WGM01
0
0
1
1
0
0
1
1
Description
Normal port operation, OC0B disconnected
Reserved
Clear OC0B on compare match when up-counting
Set OC0B on compare match when down-counting
Set OC0B on compare match when up-counting
Clear OC0B on compare match when down-counting
Table
WGM00
0
1
0
1
0
1
0
1
15-8. Modes of operation supported by the Timer/Counter
Timer/counter
phase correct
phase correct
“Modes of operation” on page
Fast PWM
Fast PWM
operation
Reserved
Reserved
mode of
Normal
PWM,
PWM,
CTC
OCRA
OCRA
OCRA
0xFF
0xFF
0xFF
TOP
ATmega48/88/168
–
–
(1)
.
“Phase correct PWM mode” on
“Fast PWM mode” on page 96
Update of
Immediate
Immediate
BOTTOM
BOTTOM
OCRx at
TOP
TOP
–
–
94).
set on
BOTTOM
BOTTOM
TOV flag
MAX
MAX
MAX
TOP
–
–
(1)(2)
103
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