LPC1767 NXP [NXP Semiconductors], LPC1767 Datasheet - Page 24

• Manufacturer Part Number: LPC1767
• Description: 32-bit ARM Cortex-M3 microcontroller; up to 512 kB flash and 64 kB SRAM with Ethernet, USB 2.0 Host/Device/OTG, CAN
• Manufacturer: NXP [NXP Semiconductors]

NXP Semiconductors
LPC1769_68_67_66_65_64_4
Product data sheet
7.16.1 Features
7.17.1 Features
7.16 UARTs
7.17 SPI serial I/O controller
7.18 SSP serial I/O controller
The LPC17xx each contain four UARTs. In addition to standard transmit and receive data
lines, UART1 also provides a full modem control handshake interface and support for
RS-485/9-bit mode allowing both software address detection and automatic address
detection using 9-bit mode.
The UARTs include a fractional baud rate generator. Standard baud rates such as
115 200 Bd can be achieved with any crystal frequency above 2 MHz.
The LPC17xx contain one SPI controller. SPI is a full duplex serial interface designed to
handle multiple masters and slaves connected to a given bus. Only a single master and a
single slave can communicate on the interface during a given data transfer. During a data
transfer the master always sends 8 bits to 16 bits of data to the slave, and the slave
always sends 8 bits to 16 bits of data to the master.
The LPC17xx contain two SSP controllers. The SSP controller is capable of operation on
a SPI, 4-wire SSI, or Microwire bus. It can interact with multiple masters and slaves on the
bus. Only a single master and a single slave can communicate on the bus during a given
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Maximum UART data bit rate of 6.25 MBit/s.
16 B Receive and Transmit FIFOs.
Register locations conform to 16C550 industry standard.
Receiver FIFO trigger points at 1 B, 4 B, 8 B, and 14 B.
Built-in fractional baud rate generator covering wide range of baud rates without a
need for external crystals of particular values.
Auto baud capabilities and FIFO control mechanism that enables software flow
control implementation.
UART1 equipped with standard modem interface signals. This module also provides
full support for hardware flow control (auto-CTS/RTS).
Support for RS-485/9-bit/EIA-485 mode (UART1).
UART3 includes an IrDA mode to support infrared communication.
All UARTs have DMA support.
Maximum SPI data bit rate of 12.5 Mbit/s
Compliant with SPI specification
Synchronous, serial, full duplex communication
Combined SPI master and slave
Maximum data bit rate of one eighth of the input clock rate
8 bits to 16 bits per transfer
Rev. 04 — 1 February 2010
LPC1769/68/67/66/65/64
32-bit ARM Cortex-M3 microcontroller
© NXP B.V. 2010. All rights reserved.
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