LPC1767 NXP [NXP Semiconductors], LPC1767 Datasheet - Page 35

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LPC1767

Manufacturer Part Number
LPC1767
Description
32-bit ARM Cortex-M3 microcontroller; up to 512 kB flash and 64 kB SRAM with Ethernet, USB 2.0 Host/Device/OTG, CAN
Manufacturer
NXP [NXP Semiconductors]
Datasheet

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NXP Semiconductors
LPC1769_68_67_66_65_64_4
Product data sheet
7.29.8 Power domains
The LPC17xx provide two independent power domains that allow the bulk of the device to
have power removed while maintaining operation of the RTC and the backup Registers.
On the LPC17xx, I/O pads are powered by the 3.3 V (V
V
CPU and most of the peripherals.
Depending on the LPC17xx application, a design can use two power options to manage
power consumption.
The first option assumes that power consumption is not a concern and the design ties the
V
supply for both pads, the CPU, and peripherals. While this solution is simple, it does not
support powering down the I/O pad ring “on the fly” while keeping the CPU and
peripherals alive.
The second option uses two power supplies; a 3.3 V supply for the I/O pads (V
a dedicated 3.3 V supply for the CPU (V
powered independently from the I/O pad ring enables shutting down of the I/O pad power
supply “on the fly”, while the CPU and peripherals stay active.
The VBAT pin supplies power only to the RTC domain. The RTC requires a minimum of
power to operate, which can be supplied by an external battery. The device core power
(V
there is no power drain from the RTC battery when V
DD(REG)(3V3)
DD(3V3)
DD(REG)(3V3)
and V
pin powers the on-chip voltage regulator which in turn provides power to the
) is used to operate the RTC whenever V
DD(REG)(3V3)
Rev. 04 — 1 February 2010
pins together. This approach requires only one 3.3 V power
LPC1769/68/67/66/65/64
DD(REG)(3V3)
32-bit ARM Cortex-M3 microcontroller
). Having the on-chip voltage regulator
DD(REG)(3V3)
DD(REG)(3V3)
DD(3V3)
) pins, while the
is available.
is present. Therefore,
© NXP B.V. 2010. All rights reserved.
DD(3V3)
35 of 66
) and

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