LPC1767 NXP [NXP Semiconductors], LPC1767 Datasheet - Page 51

• Manufacturer Part Number: LPC1767
• Description: 32-bit ARM Cortex-M3 microcontroller; up to 512 kB flash and 64 kB SRAM with Ethernet, USB 2.0 Host/Device/OTG, CAN
• Manufacturer: NXP [NXP Semiconductors]

NXP Semiconductors
Table 14.
C
[1]
LPC1769_68_67_66_65_64_4
Product data sheet
Symbol
t
t
t
V
t
t
t
t
t
t
r
f
FRFM
FEOPT
FDEOP
JR1
JR2
EOPR1
EOPR2
Fig 16. Differential data-to-EOP transition skew and EOP width
L
CRS
= 50 pF; R
Characterized but not implemented as production test. Guaranteed by design.
T
PERIOD
differential
data lines
Dynamic characteristics: USB pins (full-speed)
pu
= 1.5 k
11.8 USB interface (LPC1769/68/66/65/64 only)
Parameter
rise time
fall time
differential rise and fall time
matching
output signal crossover voltage
source SE0 interval of EOP
source jitter for differential transition
to SE0 transition
receiver jitter to next transition
receiver jitter for paired transitions
EOP width at receiver
EOP width at receiver
Ω
on D+ to V
n × T
differential data to
crossover point
DD(3V3)
SE0/EOP skew
PERIOD
, unless otherwise specified.
+ t
FDEOP
Rev. 04 — 1 February 2010
Conditions
10 % to 90 %
10 % to 90 %
see
see
10 % to 90 %
must reject as
EOP; see
Figure 16
must accept as
EOP; see
Figure 16
t
r
/ t
f
Figure 16
Figure 16
crossover point
LPC1769/68/67/66/65/64
extended
[1]
[1]
32-bit ARM Cortex-M3 microcontroller
Min
8.5
7.7
-
1.3
160
−2
−18.5
−9
40
82
source EOP width: t
receiver EOP width: t
Typ
-
-
-
-
-
-
-
-
-
-
© NXP B.V. 2010. All rights reserved.
Max
13.8
13.7
109
2.0
175
+5
+18.5
+9
-
-
FEOPT
002aab561
EOPR1
, t
EOPR2
Unit
ns
ns
%
V
ns
ns
ns
ns
ns
ns
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