LPC1767 NXP [NXP Semiconductors], LPC1767 Datasheet - Page 6

• Manufacturer Part Number: LPC1767
• Description: 32-bit ARM Cortex-M3 microcontroller; up to 512 kB flash and 64 kB SRAM with Ethernet, USB 2.0 Host/Device/OTG, CAN
• Manufacturer: NXP [NXP Semiconductors]

NXP Semiconductors
6. Pinning information
Table 3.
LPC1769_68_67_66_65_64_4
Product data sheet
Symbol
P0[0] to P0[31]
P0[0]/RD1/TXD3/
SDA1
P0[1]/TD1/RXD3/
SCL1
P0[2]/TXD0/AD0[7] 98
P0[3]/RXD0/AD0[6] 99
P0[4]/
I2SRX_CLK/
RD2/CAP2[0]
Pin description
6.1 Pinning
6.2 Pin description
Pin
46
47
81
[1]
[1]
[2]
[2]
[1]
Fig 2.
Type
I/O
I/O
I
O
I/O
I/O
O
I
I/O
I/O
O
I
I/O
I
I
I/O
I/O
I
I
Pin configuration LQFP100 package
Description
Port 0: Port 0 is a 32-bit I/O port with individual direction controls for each bit. The
operation of port 0 pins depends upon the pin function selected via the pin connect
block. Pins 12, 13, 14, and 31 of this port are not available.
P0[0] — General purpose digital input/output pin.
RD1 — CAN1 receiver input. (LPC1769/68/66/65/64 only).
TXD3 — Transmitter output for UART3.
SDA1 — I
P0[1] — General purpose digital input/output pin.
TD1 — CAN1 transmitter output. (LPC1769/68/66/65/64 only).
RXD3 — Receiver input for UART3.
SCL1 — I
P0[2] — General purpose digital input/output pin.
TXD0 — Transmitter output for UART0.
AD0[7] — A/D converter 0, input 7.
P0[3] — General purpose digital input/output pin.
RXD0 — Receiver input for UART0.
AD0[6] — A/D converter 0, input 6.
P0[4] — General purpose digital input/output pin.
I2SRX_CLK — Receive Clock. It is driven by the master and received by the
slave. Corresponds to the signal SCK in the I
(LPC1769/68/67/66/65 only).
RD2 — CAN2 receiver input. (LPC1769/68/66/65/64 only).
CAP2[0] — Capture input for Timer 2, channel 0.
Rev. 04 — 1 February 2010
2
2
C1 clock input/output. (This is not an I
C1 data input/output. (This is not an I
25
1
LPC176xFBD100
LPC1769/68/67/66/65/64
32-bit ARM Cortex-M3 microcontroller
002aad945
75
51
2
S-bus specification.
2
2
C-bus compliant open-drain pin).
C-bus compliant open-drain pin).
© NXP B.V. 2010. All rights reserved.
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