AK5700VN AKM [Asahi Kasei Microsystems], AK5700VN Datasheet - Page 27

• Manufacturer Part Number: AK5700VN
• Description: 16-Bit ?? Mono ADC with PLL & MIC-AMP
• Manufacturer: AKM [Asahi Kasei Microsystems]

ASAHI KASEI
The AK5700 becomes EXT Master Mode by setting as Figure 45. Master clock is input from MCKI pin, the internal PLL
circuit is not operated. The clock required to operate is MCKI (256fs, 512fs or 1024fs). The input frequency of MCKI is
selected by FS1-0 bits (see Table 12).
MCKI should always be present whenever the ADC is in operation (PMADC bit = “1”). If MCKI is not provided, the
AK5700 may draw excess current and it is not possible to operate properly because utilizes dynamic refreshed logic
internally. If MCKI is not present, the ADC should be in the power-down mode (PMADC bits = “0”).
MS0569-E-01
EXT Master Mode (PMPLL bit = “0”, M/S bit = “1”, TE3-0 bits = “0101”, TMASTER bit = “1”)
Mode
0
1
2
3
FS3-2 bits
Don’t care
Don’t care
Don’t care
Don’t care
BCKO1 bit
AK5700
0
0
1
1
Table 13. BCLK Output Frequency at Master Mode
Table 12. MCKI Frequency at EXT Master Mode
FS1 bit
MCKO
MCKI
BCLK
LRCK
SDTO
0
0
1
1
Figure 23. EXT Master Mode
BCKO0 bit
FS0 bit
0
1
0
1
256fs, 512fs or 1024fs
0
1
0
1
32fs or 64fs
- 27 -
1fs
MCKI Input
BCLK Output
Frequency
Frequency
1024fs
256fs
512fs
256fs
N/A
32fs
64fs
N/A
MCLK
BCLK
LRCK
SDTI
DSP or μP
Sampling Frequency
7.35kHz ∼ 48kHz
7.35kHz ∼ 13kHz
7.35kHz ∼ 26kHz
7.35kHz ∼ 48kHz
Default
Range
Default
[AK5700]
2006/12