AK5700VN AKM [Asahi Kasei Microsystems], AK5700VN Datasheet - Page 29

• Manufacturer Part Number: AK5700VN
• Description: 16-Bit ?? Mono ADC with PLL & MIC-AMP
• Manufacturer: AKM [Asahi Kasei Microsystems]

DIF1
ASAHI KASEI
Fore types of data format are available and are selected by setting the DIF1-0 bits (see Table 15). In all modes, the serial
data is MSB first, 2’s complement format. Audio interface formats can be used in both master and slave modes. LRCK,
BCLK and SDTO pins are used in master mode. EXLRCK, EXBCLK and SDTO pins are used in slave mode. In modes
2 and 3, the SDTO is clocked out on the falling edge (“↓”) of BCLK/EXBCLK. SDTO pin outputs same data two times in
one period of EXLRCK/LRCK.
In Mode 0 (DSP mode 0), the audio I/F timing is changed by BCKP and MSBS bits.
When BCKP bit is “0”, SDTO data is output by rising edge (“↑”) of BCLK/EXBCLK.
When BCKP bit is “1”, SDTO data is output by falling edge (“↓”) of BCLK/EXBCLK.
MSB data position of SDTO can be shifted by MSBS bit. The shifted period is a half of BCLK/EXBCLK.
If 16-bit data that ADC outputs is converted to 8-bit data by removing LSB 8-bit, “−1” at 16bit data is converted to “−1”
at 8-bit data. And when the DAC playbacks this 8-bit data, “−1” at 8-bit data will be converted to “−256” at 16-bit data
and this is a large offset. This offset can be removed by adding the offset of “128” to 16-bit data before converting to 8-bit
data.
MS0569-E-01
0
Audio Interface Format
Mode
0
1
2
3
DIF0
0
DIF1 bit
MSBS
0
0
1
1
0
0
1
1
BCKP
DIF0 bit
0
1
0
1
0
1
0
1
MSB of SDTO is output by the rising edge (“↑”) of the first BCLK/EXBCLK
after the rising edge (“↑”) of LRCK/EXLRCK (Figure 26).
MSB of SDTO is output by the falling edge (“↓”) of the first
BCLK/EXBCLK after the rising edge (“↑”) of LRCK/EXLRCK (Figure 27).
MSB of SDTO is output by next rising edge (“↑”) of the falling edge (“↓”) of
the first BCLK/EXBCLK after the rising edge (“↑”) of LRCK/EXLRCK
(Figure 28).
MSB of SDTO is output by next falling edge (“↓”) of the rising edge (“↑”) of
the first BCLK/EXBCLK after the rising edge (“↑”) of LRCK/EXLRCK
(Figure 29).
Table 16. Audio Interface Format in Mode 0
Table 15. Audio Interface Format
I
MSB justified
2
DSP Mode 0
S compatible
Reserved
SDTO
- 29 -
Audio Interface Format
BCLK, EXBCLK
≥ 32fs
≥ 32fs
32fs
-
See Table 16
Figure 30
Figure 31
Figure
-
Default
[AK5700]
2006/12