PCD5003AH Philips Semiconductors, PCD5003AH Datasheet - Page 11

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PCD5003AH

Manufacturer Part Number
PCD5003AH
Description
Enhanced Pager Decoder for POCSAG
Manufacturer
Philips Semiconductors
Datasheet

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7.16
The sync word recognized by the PCD5003A is shown in
the call header (bits S3 to S1). The decimal value
represents the identifier number in the EEPROM of the
UPSW in question. A value of 7 indicates the standard
POCSAG sync word.
7.17
Table 10 shows how the different types of detected errors
are encoded in the call data output format.
A message code-word containing more than a single bit
error (bit E3 = 1) may appear as an address code-word
(bit M1 = 0) after error correction. In this event the
code-word is processed as message data and does not
cause call termination.
1999 Jan 08
handbook, full pagewidth
Enhanced Pager Decoder for POCSAG
Sync word indication
Error type indication
no preamble or
sync word
(3 batches)
no preamble or
sync word
(1 batch)
Fig.4 ACCESS synchronization algorithm.
sync word
sync word
sync word
sync word
OFF to ON status
preamble receive
fade recovery
data receive
switch-on
carrier off
data fail
11
7.18
Data transfer is initiated either during sync word periods or
as soon as the receiver is disabled after call termination.
If the SRAM buffer is full, data transfer is initiated
immediately during the next code-word.
When the PCD5003A is ready to transfer received call
data an external interrupt will be generated via output INT.
Any message data can be read by accessing the RAM
output register via the I
output starting from the position indicated by the RAM read
pointer.
no preamble or
sync word
(1 batch)
no preamble or
sync word
(15 batches)
preamble
sync word
no sync word
Data transfer
preamble
preamble
preamble
MLC247
2
C-bus interface. Bytes will be
Product specification
PCD5003A

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