PCD5003AH Philips Semiconductors, PCD5003AH Datasheet - Page 37

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PCD5003AH

Manufacturer Part Number
PCD5003AH
Description
Enhanced Pager Decoder for POCSAG
Manufacturer
Philips Semiconductors
Datasheet

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Philips Semiconductors
Notes
1. 32768 Hz reference signal: 32 pulses per 75 clock cycles, alternately separated by 1 or 2 pulse periods
2. 50 Hz reference signal: square-wave.
3. The fall time may be faster than prescribed in the I
4. Duration depends on programmed bit rate; after reset t
5. Nominal values; pause in 12th data bit (see Table 12).
1999 Jan 08
POCSAG data timing (1200 bits/s)
f
t
t
t
t
POCSAG data timing (2400 bits/s)
f
t
t
t
t
Synthesizer control
t
f
t
t
t
t
t
t
SYMBOLS
DI
BIT
CW
PA
BAT
DI
BIT
CW
PA
BAT
ZSU
ZSC
ZCL
ZSD
ZDS
ZDL1
ZLE
ZDL2
Enhanced Pager Decoder for POCSAG
(pulse duration: t
To increase the fall time external capacitance is required.
data input rate
bit duration
code-word duration
preamble duration
batch duration
data input rate
bit duration
code-word duration
preamble duration
batch duration
synthesizer set-up duration
output clock frequency
clock pulse duration
data bit duration
data bit set-up time
data load enable delay
load enable pulse duration
inter block delay
RFP
PARAMETER
). The timing is shown in Fig.15.
SPF byte 01H;
bits D5, D4 = 1 0
SPF byte 01H;
bits D5, D4 = 1 1
oscillator running; note 4
note 5
note 5
2
C-bus specification for very low load capacitance values.
CONDITIONS
37
ZSU
= 1.5 bits.
480
240
1
MIN.
1200
833.3
26.7
453.3
2400
416.6
13.3
226.6
38400
13.02
26.04
13.02
91.15
13.02
117.19
TYP.
Product specification
PCD5003A
2
MAX.
bits/s
ms
ms
ms
bits/s
ms
ms
ms
bits
Hz
UNIT
s
s
s
s
s
s
s
s

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