PCD5003AH Philips Semiconductors, PCD5003AH Datasheet - Page 19

• Manufacturer Part Number: PCD5003AH
• Description: Enhanced Pager Decoder for POCSAG
• Manufacturer: Philips Semiconductors

Philips Semiconductors
7.28
The status/control register consists of two independent
registers, one for reading (status) and one for writing
(control).
The status register shows the current operating condition
of the decoder and the cause(s) of an external interrupt.
The control register activates/deactivates certain
functions. Tables 14 and 15 show the bit allocations of
both registers.
Table 14 Status register (00H; read)
Note
1. After a status read operation bits D3, D4 and D7 are always reset, bits D1 and D0 only when no second call is
Table 15 Control register (00H; write)
1999 Jan 08
Enhanced Pager Decoder for POCSAG
BIT (MSB: D7)
pending. D2 is reset when the RAM is empty (read and write pointers equal).
D1 and D0
D3 and D2
Status/control register
BIT
D4
D5
D6
D7
D0
D1
D2
D3
D4
D5
D6
D7
(1)
VALUE
VALUE
0 0
0 1
1 0
1 1
0 0
0 1
1 0
1 1
1
1
1
1
1
1
0
1
1
0
1
1
1
1
no new call data
new call received
reserved for future use
reserved for future use
no data to be read (default after reset)
RAM read/write pointers different: data to be read
RAM read/write pointers equal: no more data to read
RAM buffer full or overflow
alert time-out expired
out-of-range
BAT input HIGH or RXE output active (selected by control bit D2)
periodic timer interrupt
forced call termination (automatically reset after termination)
EEPROM programming enable
BAT input selected for monitoring (status bit D6)
RXE output selected for monitoring (status bit D6)
receiver continuously enabled (RXE = 1, ROE = 1)
decoder in OFF status (while DON = 0)
decoder in ON status
out-of-range interrupt masked
BAT/RXE monitor interrupt masked
periodic timer interrupt masked
19
All status bits will be reset after a status read operation
except for the out-of-range, battery-low and receiver
enable indicator bits (see note 1 to Table 14).
Status bit D0 is set when call reception is started by
detection of an enabled RIC (user address). This does not
generate an interrupt.
DESCRIPTION
DESCRIPTION
Product specification
PCD5003A