PCD5003AH Philips Semiconductors, PCD5003AH Datasheet - Page 28

• Manufacturer Part Number: PCD5003AH
• Description: Enhanced Pager Decoder for POCSAG
• Manufacturer: Philips Semiconductors

Philips Semiconductors
7.58
Data for programming a PLL synthesizer via pins ZSD,
ZSC and ZLE can be stored in row 1 of the EEPROM.
Six bytes are available starting from address 08H.
Data is transferred in two serial blocks of 24 bits each,
starting with bit 0 (MSB) of block 1. Any unused bits must
be programmed at the beginning of a block.
7.59
Up to 6 different identifiers can be stored in EEPROM for
matching with incoming data. The PCD5003A can
distinguish two types of identifiers:
Table 25 Synthesizer programming data (EEPROM address 08H to 0DH)
Table 26 Identifier storage allocation (EEPROM address 10H to 25H)
1999 Jan 08
ADDRESS (HEX)
ADDRESS (HEX)
User addresses (RIC)
User Programmable Sync Words (UPSW).
Enhanced Pager Decoder for POCSAG
18 to 1D
10 to 15
20 to 25
Synthesizer programming data
Identifier storage allocation
0A
0B
0C
0D
08
09
BIT (MSB: D7)
D7 to D0
D7 to D0
D7 to D0
D7 to D0
D7 to D0
D7 to D0
BYTE
1
2
3
bits 0 to 7 of data block 1 (bit 0 is MSB)
bits 8 to 15
bits 16 to 23
bits 0 to 7 of data block 2 (bit 0 is MSB)
bits 8 to 15
bits 16 to 23
identifier number 1 to 6
identifier number 1 to 6
identifier number 1 to 6
28
Identifiers are stored in EEPROM rows 2, 3 and 4. Each
identifier location consists of 3 bytes in the same column.
The identifier number is equal to the column number + 1.
Only the last 4 identifiers (numbers 3 to 6) can be
programmed as a UPSW. Identifiers 1 and 2 always
represent RICs. A UPSW represents an unused address
and must differ by more than 6 bits from preamble to
guarantee detection.
The standard POCSAG sync word is always enabled and
has identifier number 7.
Table 26 shows the memory locations of the 6 identifiers.
The bit allocation per identifier is given in Table 27.
DESCRIPTION
DESCRIPTION
Product specification
PCD5003A