MSP3421G MICRONAS [Micronas], MSP3421G Datasheet - Page 86

• Manufacturer Part Number: MSP3421G
• Description: Multistandard Sound Processor Family with Virtual Dolby Surround
• Manufacturer: MICRONAS [Micronas]

MSP 34x1G
Table 6–2: Demodulator Read Registers; Subaddress: 11
6.2. DSP Write and Read Registers for Manual/Compatibility Mode
Table 6–3: DSP-Write Registers; Subaddress: 12
Table 6–4: DSP Read Registers; Subaddress: 13
86
Demodulator
Read Registers
C_AD_BITS
ADD_BITS
CIB_BITS
ERROR_RATE
PLL_CAPS
AGC_GAIN
Write Register
Volume SCART1 channel: Ctrl. mode
FM Fixed Deemphasis
FM Adaptive Deemphasis
Identification Mode
FM DC Notch
Volume SCART2 channel: Ctrl. mode
Additional Read Registers
Stereo detection register for
A2 Stereo Systems
DC level readout FM1/Ch2-L
DC level readout FM2/Ch1-R
Address
(hex)
00 23
00 38
00 3E
00 57
02 1F
02 1E
MSP-
Version
3411,
3451
Address
(hex)
00 07
00 0F
00 15
00 17
00 40
Address
(hex)
00 18
00 1B
00 1C
Description
NICAM-Sync bit, NICAM-C-Bits, and three LSBs of additional data bits
NICAM: bit[10:3] of additional data bits
NICAM: CIB1 and CIB2 control bits
NICAM error rate, updated with 182 ms
Not for customer use
Not for customer use
Bits
[7:0]
[15:8]
[7:0]
[7:0]
[7:0]
[7:0]
Bits
[15:8]
[15:0]
[15:0]
hex
hex
, all registers are readable as well
, all registers are not writable
[Linear mode / logarithmic mode]
[B/G, M]
[Linear mode / logarithmic mode]
Operational Modes and Adjustable Range
[50 s, 75 s, J17, OFF]
[OFF, WP1]
[ON, OFF]
Output Range
[80
[8000
[8000
hex
hex
hex
hex
... 7F
; these registers are not writable!
... 7FFF
... 7FFF
hex
]
hex
hex
]
]
16 bit two’s complement
16 bit two’s complement
8 bit two’s complement
PRELIMINARY DATA SHEET
Reset
Mode
00
50 s
OFF
B/G
ON
00
hex
hex
Micronas
Page
95
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95
96
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