MSP3421G MICRONAS [Micronas], MSP3421G Datasheet - Page 98

• Manufacturer Part Number: MSP3421G
• Description: Multistandard Sound Processor Family with Virtual Dolby Surround
• Manufacturer: MICRONAS [Micronas]

MSP 34x1G
6.5.5. NICAM Deemphasis
A J17 Deemphasis is always applied to the NICAM
signal. It is not switchable.
6.5.6. Identification Mode for A2 Stereo Systems
To shorten the response time of the identification algo-
rithm after a program change between two FM-Stereo
capable programs, the reset of the ident-filter can be
applied.
Sequence:
1. Program change
2. Reset ident-filter
3. Set identification mode back to standard B/G or M
4. Wait approx. 500 ms
5. Read stereo detection register
Note: This register is initialized during STANDARD
SELECTION and is automatically updated when Auto-
matic Sound Select (MODUS[0]=1) is on.
6.5.7. FM DC Notch
The DC compensation filter (FM DC Notch) for FM
input can be switched off. This is used to speed up the
automatic search function (see Section 6.4.7.). In nor-
mal FM-mode, the FM DC Notch should be switched
on.
98
Identification Mode
Standard B/G
(German Stereo)
Standard M
(Korean Stereo)
Reset of Ident-Filter
FM DC Notch
ON
OFF
00 15
0000 0000
RESET
0000 0001
0011 1111
00 17
0000 0000
Reset
0011 1111
hex
hex
L
00
01
3F
L
00
3F
hex
hex
hex
hex
hex
6.6. Manual/Compatibility Mode:
All readable registers are 16-bit wide. Transmissions
via I
the defined 16-bit words are divided into low and high
byte, thus holding two different control entities.
These registers are not writable.
6.6.1. Stereo Detection Register
Note: It is no longer necessary to read out and evalu-
ate the A2 identification level. All evaluation is per-
formed in the MSP and indicated in the STATUS regis-
ter.
6.6.2. DC Level Register
The DC level register measures the DC component of
the incoming FM signals (FM1 and FM2). This can be
used for seek functions in satellite receivers and for IF
FM frequencies fine tuning. A too low demodulation
frequency (DCO) results in a positive DC-level and
vice versa. For further processing, the DC content of
the demodulated FM signals is suppressed. The time
constant
Register, is approximately 28 ms.
Stereo Detection
Register
Stereo Mode
MONO
STEREO
BILINGUAL
DC Level Readout
FM1 (MSP-Ch2)
DC Level Readout
FM2 (MSP-Ch1)
DC Level
2
Description of DSP Read Registers
C bus have to take place in 16-bit words. Some of
for A2 Stereo Systems
defining the transition time of the DC Level
PRELIMINARY DATA SHEET
00 18
Reading
(two’s complement)
near zero
positive value (ideal
reception: 7F
negative value (ideal
reception: 80
00 1B
00 1C
[8000
values are 16 bit two’s
complement
hex
hex
hex
hex
... 7FFF
hex
hex)
)
hex
H
H L
H L
Micronas
]