MSP3421G MICRONAS [Micronas], MSP3421G Datasheet - Page 93

• Manufacturer Part Number: MSP3421G
• Description: Multistandard Sound Processor Family with Virtual Dolby Surround
• Manufacturer: MICRONAS [Micronas]

PRELIMINARY DATA SHEET
Table 6–13: Loading sequence for FIR-coefficients
6.3.6. FIR-Parameter, Registers FIR1 and FIR2
Note: The use of this register is no longer recom-
mended. It should be used only in cases where soft-
ware compatibility to the MSP 34x0D is required.
Using the STANDARD SELECTION register together
with the MODUS register provides a more economic
way to program the MSP 34x1G.
Data-shaping and/or FM/AM bandwidth limitation is
performed by a pair of linear phase Finite Impulse
Response filters (FIR-filter). The filter coefficients are
programmable and are either configured automatically
by the STANDARD SELECT register or written manu-
ally by the control processor via the control bus. Two
not necessarily different sets of coefficients are
required: one for MSP-Ch1 (NICAM or FM2) and one
for MSP-Ch2 (FM1 = FM-mono). In Table 6–14 several
coefficient sets are proposed.
To load the FIR-filters, the following data values are to
be
LSB-bound in a 16-bit word.
Micronas
FIR1 00 01
No.
1
2
3
4
5
6
FIR2 00 05
No.
1
2
3
4
5
6
7
8
9
transferred
Symbol Name
NICAM/FM2_Coeff. (5)
NICAM/FM2_Coeff. (4)
NICAM/FM2_Coeff. (3)
NICAM/FM2_Coeff. (2)
NICAM/FM2_Coeff. (1)
NICAM/FM2_Coeff. (0)
Symbol Name
IMREG1
IMREG1/ IMREG2
IMREG2
FM/AM_Coef (5)
FM/AM_Coef (4)
FM/AM_Coef (3)
FM/AM_Coef (2)
FM/AM_Coef (1)
FM/AM_Coef (0)
hex
hex
(MSP-Ch1: NICAM/FM2)
(MSP-Ch2: FM1/AM)
8
bits
at
Bits
8
8
8
8
8
8
Bits
8
8
8
8
8
8
8
8
8
a
time
Value
see Table 6–14
Value
04
40
00
see Table 6–14
hex
hex
hex
embedded
The loading sequences must be obeyed. To change a
coefficient set, the complete block FIR1 or FIR2 must
be transmitted.
Note: For compatibility with MSP 3410B, IMREG1 and
IMREG2 have to be transmitted. The value for
IMREG1 and IMREG2 is 004. Due to the partitioning to
8-bit units, the values 04
6.3.7. DCO-Registers
Note: The use of this register is no longer recom-
mended. It should be used only in cases where soft-
ware-compatibility to the MSP 34x0D is required.
Using the STANDARD SELECTION register together
with the MODUS register provides a more economic
way to program the MSP 34x1G.
When selecting a TV-sound standard by means of the
STANDARD SELECT register, all frequency tuning is
performed automatically.
If manual setting of the tuning frequency is required, a
set of 24-bit registers determining the mixing frequen-
cies of the quadrature mixers can be written manually
into the IC. In Table 6–15, some examples of DCO reg-
isters are listed. It is necessary to divide them up into
low part and high part. The formula for the calculation
of the registers for any chosen IF frequency is as fol-
lows:
INCR
with: int = integer function
Conversion of INCR into hex-format and separation of
the 12-bit low and high parts lead to the required regis-
ter values (DCO1_HI or _LO for MSP-Ch1, DCO2_HI
or LO for MSP-Ch2).
dec
f
f
S
= int(f/fs 2
= IF frequency in MHz
= sampling frequency (18.432 MHz)
24
)
hex
, 40
hex
MSP 34x1G
, and 00
hex
arise.
93