LFE3-150EA-6LFN672C Lattice, LFE3-150EA-6LFN672C Datasheet - Page 120

• Manufacturer Part Number: LFE3-150EA-6LFN672C
• Description: FPGA - Field Programmable Gate Array 149K LUTs 380 I/O 1.2V -6 SPEED
• Manufacturer: Lattice

Specifications of LFE3-150EA-6LFN672C

• Rohs: yes
• Factory Pack Quantity: 40

Pin Information Summary (Cont.)
Emulated Differential I/O per
Bank
Highspeed Differential I/O per
Bank
Total Single Ended/ Total
Differential I/O per Bank
DDR Groups Bonded per
Bank
SERDES Quads
1. These pins must remain floating on the board.
2. Some DQS groups may not support DQS-12. Refer to the device pinout (.csv) file.
2
Pin Information Summary
Pin Type
Bank 0
Bank 1
Bank 2
Bank 3
Bank 6
Bank 7
Bank 8
Bank 0
Bank 1
Bank 2
Bank 3
Bank 6
Bank 7
Bank 8
Bank 0
Bank 1
Bank 2
Bank 3
Bank 6
Bank 7
Bank 8
Bank 0
Bank 1
Bank 2
Bank 3
Bank 6
Bank 7
Configuration
Bank 8
256 ftBGA 328 csBGA 484 fpBGA 256 ftBGA 484 fpBGA 672 fpBGA
26/13
20/10
23/11
24/12
14/7
18/9
8/4
13
12
7
2
4
5
6
0
0
2
5
5
5
0
2
1
0
1
1
1
0
1
ECP3-17EA
4-6
20/10
30/15
24/12
10/5
12/6
11/5
9/4
10
12
5
2
2
1
9
0
0
2
4
4
6
0
1
0
0
0
0
2
0
1
36/18
24/12
44/22
44/22
36/18
24/12
14/7
18
12
13
13
10
12
4
0
0
3
9
9
8
0
3
2
1
3
3
2
0
1
LatticeECP3 Family Data Sheet
26/13
20/10
23/11
24/12
14/7
18/9
8/4
13
12
7
1
5
6
6
0
0
3
4
4
5
0
2
1
0
1
1
1
0
1
Pinout Information
ECP3-35EA
42/21
36/18
28/14
58/29
67/33
40/20
24/12
21
18
20
22
11
12
11
8
0
0
6
9
9
0
3
3
2
3
4
3
0
1
48/24
36/18
28/14
63/31
65/32
46/23
24/12
24
18
19
20
13
12
12
12
10
8
0
0
6
0
4
3
2
4
4
3
0
1