74VHC112M_Q Fairchild Semiconductor, 74VHC112M_Q Datasheet - Page 8

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74VHC112M_Q

Manufacturer Part Number
74VHC112M_Q
Description
Flip Flops Dual J-K Flip-Flops
Manufacturer
Fairchild Semiconductor
Datasheet

Specifications of 74VHC112M_Q

Number Of Circuits
2
Logic Family
74VHC
Logic Type
J-K Flip-Flop
Polarity
Inverting/Non-Inverting
Input Type
Single-Ended
Output Type
Differential
Propagation Delay Time
15 ns
High Level Output Current
- 8 mA
Low Level Output Current
8 mA
Supply Voltage - Max
5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Package / Case
SOIC-16
Minimum Operating Temperature
- 40 C
Number Of Input Lines
2
Number Of Output Lines
1
Supply Voltage - Min
2 V
©1995 Fairchild Semiconductor Corporation
74VHC112 Rev. 1.2
Physical Dimensions
Dimensions are in millimeters unless otherwise noted.
MTC16rev4
Figure 3. 16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
0.11
5.00±0.10
4.55
(Continued)
Package Number MTC16
4.4±0.1
8
1.45
0.65
5.00
12°
4.45
5.90
www.fairchildsemi.com
7.35

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