74F112SC_Q Fairchild Semiconductor, 74F112SC_Q Datasheet - Page 2

• Manufacturer Part Number: 74F112SC_Q
• Description: Flip Flops Dual J-K Flip-Flop
• Manufacturer: Fairchild Semiconductor

Specifications of 74F112SC_Q

• Number Of Circuits: 2
• Logic Family: 74F
• Logic Type: D-Type Flip-Flop
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Package / Case: SOIC-16
• Minimum Operating Temperature: 0 C

www.fairchildsemi.com
Unit Loading/Fan Out
Truth Table
H (h)
L (l)

X
Q
Lower case letters indicate the state of the referenced input or output one setup time prior to the HIGH-to-LOW clock transition.
Logic Diagram
(One Half Shown)
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
0
(Q
Immaterial
0
HIGH-to-LOW Clock Transition
LOW Voltage Level
)
HIGH Voltage Level
Before HIGH-to-LOW Transition of Clock
J
CP
C
S
Q
1
D1
Pin Names
D1
1
, J
, Q
1
, S
, C
, CP
2
, K
2
D2
D2
, Q
1
2
, K
1
, Q
2
2
Data Inputs
Clock Pulse Inputs (Active Falling Edge)
Direct Clear Inputs (Active LOW)
Direct Set Inputs (Active LOW)
Outputs
S
H
H
H
H
H
L
L
D
C
H
H
H
H
H
L
L
D
Description
Inputs
CP




X
X
X
2
X
X
X
J
h
h
l
l
K
X
X
X
h
h
l
l
Q
Q
HIGH/LOW Output I
Q
H
H
H
L
L
Outputs
0
0
50/33.3
1.0/1.0
1.0/4.0
1.0/5.0
1.0/5.0
U.L.
Q
Q
Q
H
H
H
L
L
0
0
20 A/ 0.6 mA
20 A/ 2.4 mA
20 A/ 3.0 mA
20 A/ 3.0 mA
Input I
1 mA/20 mA
IH
OH
/I
/I
IL
OL